XRT94L43IB-F Exar Corporation, XRT94L43IB-F Datasheet - Page 23

• Manufacturer Part Number: XRT94L43IB-F
• Description: IC MAPPER SONET/SDH OC12 516BGA
• Manufacturer: Exar Corporation

Specifications of XRT94L43IB-F

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 2.5V, 3.3V
• Package / Case: 516-BBGA
• Mounting Type: Surface Mount
• Product: Mapper
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT94L43
SONET/SDH OC-12 TO 12XDS3/E3 MAPPER
SONET/SDH SERIAL LINE INTERFACE PINS
P
AF6
R2
R4
IN
#
TXL_CLKO_R_N
REFCLK
LOS
S
IGNAL
N
AME
I/O
O
I
I
LVPECL
S
T
IGNAL
TTL
TTL
YPE
Transmit STS-12/STM-4 Clock - Negative Polarity PECL Output
- Redundant Port:
This output pin, along with TXL_CLKO_R_P functions as the
Transmit Clock Output signal. These output pins are typically used
in High-Speed Back-Plane Applications. In this case, outbound
STS-12/STM-4 data is output via the TXL_DATA_R_P/
TXL_DATA_R_N output pins upon the rising edge of this clock sig-
nal.
For APS (Automatic Protection Switching) purposes, this output
pin, along with TXL_CLKO_R_P functions as the Redundant
Transmit Output Clock signal.
77.76MHz or 622.08MHz Clock Synthesizer Reference Clock
Input Pin:
The function of this input pin depends upon whether or not the
Transmit STS-12/STM-4 Clock Synthesizer block is enabled.
If Clock Synthesizer is Enabled.
If the Transmit STS-12/STSM-4 Clock Synthesizer block is to be
used to generate the 77.76MHz and/or 622.08MHz clock signal for
the STS-12/STM-4 block, then a clock signal of either of the follow-
ing frequencies, must be applied to this input pin.
•
•
•
•
Afterwards, the appropriate data needs to be written into the Inter-
face Control Register - Byte 2 (Indirect Address = 0x00, 0x31),
(Direct Address = 0x0131) in order to;
(1) configure the Clock Synthesizer Block to accept any of the
above-mentioned signals and generate a 77.76MHz or 622.08MHz
clock signal,
(2) to configure the Clock Synthesizer to function as the Clock
Source for the STS-12/STM-4 block.
If Clock Synthesizer is NOT Enabled:
If the Transmit STS-12/STSM-4 Clock Synthesizer block is NOT to
be used to generate the 77.76MHz and/or 622.08MHz clock signal
for the STS-12/STM-4 block, then a 77.76MHz clock signal must
be applied to this input pin.
Loss of Optical Carrier Input - Primary:
The Loss of Carrier output (from the Optical Transceiver) should be
connected to this input pin.
If this input pin is pulled "High", then the Primary Receive STS-12
TOH Processor block will declare a Loss of Optical Carrier condi-
tion.
N
OTE
12.96MHz
19.44MHz
51.84 MHz
77.76 MHz
: This input pin is only active if the Primary Port is active. This
17
input pin is inactive if the Redundant Port is active.
D
ESCRIPTION
REV. 1.0.2