LFE2M20SE-5FN256C Lattice, LFE2M20SE-5FN256C Datasheet - Page 207
![FPGA - Field Programmable Gate Array 19K LUTs 140 I/O S-Ser SERDES DSP -5](/photos/16/14/161499/landingpagelatticeecp2m_sml.jpg)
LFE2M20SE-5FN256C
Manufacturer Part Number
LFE2M20SE-5FN256C
Description
FPGA - Field Programmable Gate Array 19K LUTs 140 I/O S-Ser SERDES DSP -5
Manufacturer
Lattice
Datasheet
1.LFE2-12SE-6FN256C.pdf
(389 pages)
Specifications of LFE2M20SE-5FN256C
Number Of Macrocells
19000
Maximum Operating Frequency
311 MHz
Number Of Programmable I/os
140
Data Ram Size
1246208
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FPBGA-256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE2M20SE-5FN256C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Lattice Semiconductor
LFE2-50E/SE and LFE2-70E/SE Logic Signal Connections: 672 fpBGA
Number
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
GND
GND
GND
GND
GND
GND
Ball
E10
G10
H10
F11
F10
G8
G7
G6
G5
E9
D9
A5
B5
C7
D7
E8
F8
H9
C5
D5
B4
C4
C3
A4
A3
B3
B2
D4
D3
C2
C1
E7
F7
E6
E5
Function
Ball/Pad
GNDIO0
GNDIO0
GNDIO0
GNDIO0
GNDIO0
GNDIO0
VCCIO0
VCCIO0
VCCIO0
VCCIO0
VCCIO0
VCCIO0
PT30B
PT30A
PT29B
PT29A
PT28B
PT28A
PT27B
PT27A
PT26B
PT26A
PT25B
PT25A
PT24B
PT24A
PT23B
PT23A
PT22B
PT10B
PT10A
PT9B
PT9A
PT8B
PT8A
PT7B
PT7A
PT6B
PT6A
PT5B
PT5A
PT4B
PT4A
PT3B
PT3A
PT2B
PT2A
Bank
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
-
-
-
-
-
-
LFE2-50E/SE
Dual Function
VREF2_0
VREF1_0
Differential
4-104
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
Function
Ball/Pad
GNDIO0
GNDIO0
GNDIO0
GNDIO0
GNDIO0
GNDIO0
VCCIO0
VCCIO0
VCCIO0
VCCIO0
VCCIO0
VCCIO0
PT39B
PT39A
PT38B
PT38A
PT37B
PT37A
PT36B
PT36A
PT35B
PT35A
PT34B
PT34A
PT33B
PT33A
PT32B
PT32A
PT31B
PT10B
PT10A
PT9B
PT9A
PT8B
PT8A
PT7B
PT7A
PT6B
PT6A
PT5B
PT5A
PT4B
PT4A
PT3B
PT3A
PT2B
PT2A
LatticeECP2/M Family Data Sheet
Bank
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
-
-
-
-
-
-
LFE2-70E/SE
Dual Function
VREF2_0
VREF1_0
Pinout Information
Differential
C
T
C
T
C
T
C
T
C
T
C
T
C
T
C
T
C
T
C
T
C
T
C
T
C
T
C
T
C
T
C
T
C
T
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