LFE2M20SE-5FN256C Lattice, LFE2M20SE-5FN256C Datasheet - Page 334
![FPGA - Field Programmable Gate Array 19K LUTs 140 I/O S-Ser SERDES DSP -5](/photos/16/14/161499/landingpagelatticeecp2m_sml.jpg)
LFE2M20SE-5FN256C
Manufacturer Part Number
LFE2M20SE-5FN256C
Description
FPGA - Field Programmable Gate Array 19K LUTs 140 I/O S-Ser SERDES DSP -5
Manufacturer
Lattice
Datasheet
1.LFE2-12SE-6FN256C.pdf
(389 pages)
Specifications of LFE2M20SE-5FN256C
Number Of Macrocells
19000
Maximum Operating Frequency
311 MHz
Number Of Programmable I/os
140
Data Ram Size
1246208
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FPBGA-256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE2M20SE-5FN256C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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LFE2M70E/SE and LFE2M100E/SE Logic Signal Connections: 1152 fpBGA
Lattice Semiconductor
Number
GNDIO
GNDIO
GNDIO
GNDIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
M10
Ball
L10
M9
M2
E1
E2
K9
H7
H6
G2
G1
H5
H2
H1
G5
G6
H3
H4
K2
K1
K5
K6
F4
F3
F1
F2
J8
J7
L8
L9
J6
J2
J1
J4
J3
J5
L2
L1
L7
-
-
Function
Ball/Pad
GNDIO7
GNDIO7
GNDIO7
GNDIO7
VCCIO7
VCCIO7
VCCIO7
VCCIO7
VCCIO7
PL11A
PL11B
PL12A
PL12B
PL13A
PL13B
PL14A
PL14B
PL15A
PL15B
PL16A
PL16B
PL17A
PL17B
PL18A
PL18B
PL19A
PL19B
PL20A
PL20B
PL21A
PL21B
PL22A
PL22B
PL24A
PL24B
PL25A
PL25B
PL26A
PL9A
PL9B
NC
NC
NC
NC
NC
NC
NC
NC
-
-
LFE2M70E/SE
Bank
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
-
-
-
-
-
-
-
-
-
-
-
-
-
-
LUM0_SPLLC_FB_A/LDQ15
LUM0_SPLLC_IN_A/LDQ15
LUM0_SPLLT_FB_A/LDQ15
LUM0_SPLLT_IN_A/LDQ15
Dual Function
VREF2_7
VREF1_7
LDQS15
LDQ15
LDQ15
LDQ15
LDQ15
LDQ15
LDQ15
LDQ15
LDQ15
LDQ15
LDQ15
LDQ15
LDQ28
LDQ28
LDQ28
LDQ28
LDQ28
Differential
T (LVDS)*
C (LVDS)*
T (LVDS)*
C (LVDS)*
C (LVDS)*
T (LVDS)*
C (LVDS)*
T (LVDS)*
C (LVDS)*
T (LVDS)*
C (LVDS)*
T (LVDS)*
C (LVDS)*
T (LVDS)*
T (LVDS)*
4-231
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
Function
Ball/Pad
GNDIO7
GNDIO7
GNDIO7
GNDIO7
GNDIO7
VCCIO7
VCCIO7
VCCIO7
VCCIO7
VCCIO7
VCCIO7
PL11A
PL11B
PL12A
PL12B
PL13A
PL13B
PL14A
PL14B
PL15A
PL15B
PL16A
PL16B
PL17A
PL17B
PL18A
PL18B
PL19A
PL19B
PL20A
PL20B
PL21A
PL21B
PL22A
PL22B
PL23A
PL23B
PL24A
PL24B
PL25A
PL25B
PL26A
PL26B
PL28A
PL28B
PL29A
PL29B
PL30A
PL9A
PL9B
LatticeECP2/M Family Data Sheet
LFE2M100E/SE
Bank
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
-
-
-
-
-
LUM0_SPLLC_FB_A/LDQ15
LUM0_SPLLC_IN_A/LDQ15
LUM0_SPLLT_FB_A/LDQ15
LUM0_SPLLT_IN_A/LDQ15
Dual Function
Pinout Information
VREF2_7
VREF1_7
LDQS15
LDQS23
LDQ15
LDQ15
LDQ15
LDQ15
LDQ15
LDQ15
LDQ15
LDQ15
LDQ15
LDQ15
LDQ15
LDQ23
LDQ23
LDQ23
LDQ23
LDQ23
LDQ23
LDQ23
LDQ23
LDQ23
LDQ23
LDQ23
LDQ23
LDQ23
LDQ23
LDQ23
LDQ32
LDQ32
LDQ32
LDQ32
LDQ32
Differential
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
C
C
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
T
T
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