LFE2M20SE-5FN256C Lattice, LFE2M20SE-5FN256C Datasheet - Page 37
![FPGA - Field Programmable Gate Array 19K LUTs 140 I/O S-Ser SERDES DSP -5](/photos/16/14/161499/landingpagelatticeecp2m_sml.jpg)
LFE2M20SE-5FN256C
Manufacturer Part Number
LFE2M20SE-5FN256C
Description
FPGA - Field Programmable Gate Array 19K LUTs 140 I/O S-Ser SERDES DSP -5
Manufacturer
Lattice
Datasheet
1.LFE2-12SE-6FN256C.pdf
(389 pages)
Specifications of LFE2M20SE-5FN256C
Number Of Macrocells
19000
Maximum Operating Frequency
311 MHz
Number Of Programmable I/os
140
Data Ram Size
1246208
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FPBGA-256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE2M20SE-5FN256C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Lattice Semiconductor
Figure 2-31. Output and Tristate Block for Left, Right and Bottom Edges
DQSXFER
DQSXFER
ONEG1
ONEG0
ONEG1
ONEG0
OPOS1
OPOS0
OPOS1
OPOS0
(CLKA)
(CLKB)
ECLK1
ECLK2
ECLK1
ECLK2
CLKA
CLKB
CLK1
CLK1
TD
TD
* Shared with input register
Clock Transfer
Clock Transfer
Registers
Registers
D
D
D-Type*
D-Type*
D-Type
D-Type
D
D
Tristate Logic
Tristate Logic
Q
Q
Q
Q
*
*
D
D
Latch
Latch
Q
Q
0
1
0
1
0
1
0
1
2-34
Note: Simplified version does not show CE and SET/RESET details
0
1
0
1
0
1
0
1
D
D
D
D
D
D
D
D
/LATCH
/LATCH
/LATCH
/LATCH
D-Type
D-Type
D-Type
D-Type
D-Type
D-Type
D-Type
D-Type
LatticeECP2/M Family Data Sheet
Q
Q
Q
Q
Q
Q
Q
Q
Comp PIO (B) in LVDS I/O Pair
True PIO (A) in LVDS I/O Pair
D
D
D
D
DDR Output
DDR Output
Latch
Latch
Latch
Latch
Registers
Registers
Q
Q
Q
Q
Output Logic
Output Logic
0
1
0
1
0
1
0
1
0
1
0
1
Programmable
Programmable
Control
Control
0
1
0
1
Architecture
0
1
0
1
DO
DO
TO
TO
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