LFE2M20SE-5FN256C Lattice, LFE2M20SE-5FN256C Datasheet - Page 214
![FPGA - Field Programmable Gate Array 19K LUTs 140 I/O S-Ser SERDES DSP -5](/photos/16/14/161499/landingpagelatticeecp2m_sml.jpg)
LFE2M20SE-5FN256C
Manufacturer Part Number
LFE2M20SE-5FN256C
Description
FPGA - Field Programmable Gate Array 19K LUTs 140 I/O S-Ser SERDES DSP -5
Manufacturer
Lattice
Datasheet
1.LFE2-12SE-6FN256C.pdf
(389 pages)
Specifications of LFE2M20SE-5FN256C
Number Of Macrocells
19000
Maximum Operating Frequency
311 MHz
Number Of Programmable I/os
140
Data Ram Size
1246208
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FPBGA-256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE2M20SE-5FN256C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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LFE2-70E/SE Logic Signal Connections: 900 fpBGA (Cont.)
Lattice Semiconductor
Ball Number
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
GND
GND
GND
GND
W1
W2
W5
P3
R6
R8
P2
P1
R5
R7
R4
R3
U7
U5
U4
U3
U8
U6
U2
U1
V7
V5
V2
V1
V8
V6
T5
T7
T3
T4
T6
T8
T2
T1
Ball/Pad Function
GNDIO7
GNDIO6
GNDIO6
GNDIO6
VCCIO7
VCCIO6
VCCIO6
VCCIO6
VCCIO6
PL54B
PL55A
PL55B
PL56A
PL56B
PL57A
PL57B
PL59A
PL59B
PL60A
PL60B
PL61A
PL61B
PL62A
PL62B
PL63A
PL63B
PL64A
PL64B
PL65A
PL65B
PL66A
PL66B
PL67A
PL67B
PL68A
PL68B
PL69A
PL69B
PL70A
PL70B
PL71A
PL71B
PL72A
LFE2-70E/SE
Bank
4-111
7
7
7
7
7
7
7
7
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
-
-
-
-
PCLKC7_0/LDQ54
PCLKC6_0/LDQ63
PCLKT7_0/LDQ54
PCLKT6_0/LDQ63
LatticeECP2/M Family Data Sheet
VREF2_6/LDQ63
VREF1_6/LDQ63
Dual Function
LDQS63
LDQS71
LDQ54
LDQ54
LDQ54
LDQ54
LDQ54
LDQ63
LDQ63
LDQ63
LDQ63
LDQ63
LDQ63
LDQ63
LDQ63
LDQ63
LDQ63
LDQ63
LDQ71
LDQ71
LDQ71
LDQ71
LDQ71
LDQ71
LDQ71
LDQ71
LDQ71
LDQ71
Pinout Information
Differential
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
T
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