EP4CGX75DF27C7N Altera, EP4CGX75DF27C7N Datasheet - Page 128

• Manufacturer Part Number: EP4CGX75DF27C7N
• Description: Cyclone IV GX
• Manufacturer: Altera
• Series: CYCLONE® IV GXr

Specifications of EP4CGX75DF27C7N

• Number Of Logic Elements/cells: 73920
• Number Of Labs/clbs: 4620
• Total Ram Bits: 4257792
• Number Of I /o: 310
• Number Of Gates: -
• Voltage - Supply: 1.16 V ~ 1.24 V
• Mounting Type: *
• Operating Temperature: 0°C ~ 85°C
• Package / Case: *
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 6–4. Number of VREF Pins Per I/O Bank for Cyclone IV E Devices
Device
Note to
(1) User I/O pins are used as inputs or outputs; clock input pins are used as inputs only; clock output pins are used as output only.
Bank
(1)
I/O
1
2
3
4
5
6
7
8
Table
EQPF
144-
1
1
1
1
1
1
1
1
EP4CE6
6–4:
UBGA
f
f
256-
1
1
1
1
1
1
1
1
1
FBGA
256-
1
1
1
1
1
1
1
1
Each Cyclone IV I/O bank has a VREF bus to accommodate voltage-referenced I/O standards. Each VREF pin is the reference
source for its V
the appropriate voltage level. If you do not use all the V
can use the VREF pin in the unused voltage-referenced groups as regular I/O pins. For example, if you have SSTL-2 Class I
input pins in I/O bank 3 and they are all placed in the VREFB1N[0] group, VREFB1N[0] must be powered with 1.25 V, and
the remaining VREFB1N[1..3] pins (if available) are used as I/O pins. If multiple V
the VREF pins must all be powered by the same voltage level because the VREF pins are shorted together within the same I/O
bank.
When VREF pins are used as regular I/Os, they have higher pin capacitance than regular user I/O pins. This has an impact on
the timing if the pins are used as inputs and outputs.
For more information about VREF pin capacitance, refer to the pin capacitance section in the
chapter.
For information about how to identify V
tool.
Table 6–4
EQPF
144-
1
1
1
1
1
1
1
1
EP4CE10
UBGA
256-
1
1
1
1
1
1
1
1
and
FBGA
256-
Table 6–5
1
1
1
1
1
1
1
1
REF
group. If you use a V
EQPF
144-
2
2
2
2
2
2
2
2
MBGA
summarize the number of VREF pins in each I/O bank for the Cyclone IV device family.
164-
2
2
2
2
2
2
2
2
EP4CE15
UBGA
256-
2
2
2
2
2
2
2
2
FBGA
256-
2
2
2
2
2
2
2
2
REF
FBGA
REF
484-
2
2
2
2
2
2
2
2
group for voltage-referenced I/O standards, connect the VREF pin for that group to
groups, refer to the Cyclone IV Device Pin-Out files or the Quartus II Pin Planner
EQPF
144-
1
1
1
1
1
1
1
1
EP4CE22
UBGA
256-
1
1
1
1
1
1
1
1
REF
FBGA
256-
1
1
1
1
1
1
1
1
groups in the I/O bank for voltage-referenced I/O standards, you
FBGA
484-
EP4CE30
4
4
4
4
4
4
4
4
FBGA
780-
4
4
4
4
4
4
4
4
UBGA
484-
4
4
4
4
4
4
4
4
EP4CE40
FBGA
484-
4
4
4
4
4
4
4
4
FBGA
780-
4
4
4
4
4
4
4
4
REF
groups are used in the same I/O bank,
UBGA
484-
2
2
2
2
2
2
2
2
EP4CE55
Cyclone IV Device Datasheet
FBGA
484-
2
2
2
2
2
2
2
2
FBGA
780-
2
2
2
2
2
2
2
2
UBGA
484-
3
3
3
3
3
3
3
3
EP4CE75
FBGA
484-
3
3
3
3
3
3
3
3
FBGA
780-
3
3
3
3
3
3
3
3
FBGA
484-
EP4CE115
3
3
3
3
3
3
3
3
FBGA
780-
3
3
3
3
3
3
3
3