EP4CGX75DF27C7N Altera, EP4CGX75DF27C7N Datasheet - Page 145

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EP4CGX75DF27C7N

Manufacturer Part Number
EP4CGX75DF27C7N
Description
Cyclone IV GX
Manufacturer
Altera
Series
CYCLONE® IV GXr

Specifications of EP4CGX75DF27C7N

Number Of Logic Elements/cells
73920
Number Of Labs/clbs
4620
Total Ram Bits
4257792
Number Of I /o
310
Number Of Gates
-
Voltage - Supply
1.16 V ~ 1.24 V
Mounting Type
*
Operating Temperature
0°C ~ 85°C
Package / Case
*
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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0
Chapter 6: I/O Features in Cyclone IV Devices
High-Speed I/O Timing
Figure 6–22. Cyclone IV Devices High-Speed I/O Timing Budget
Note to
(1) The equation for the high-speed I/O timing budget is:
© December 2010 Altera Corporation
Period
Figure
=
6–22:
f
Internal Clock Period
0.5
TCCS
Figure 6–21. High-Speed I/O Timing Diagram
Figure 6–22
For more information, refer to the
+
RSKM
+
SW
shows the Cyclone IV devices high-speed I/O timing budget.
0.5 × TCCS
Internal Clock
+
Input Clock
Input Data
RSKM
Receiver
External
RSKM
+
0.5
TCCS
TCCS.
RSKM
Cyclone IV Device Datasheet
(Note 1)
SW
Sampling Window (SW)
Time Unit Interval (TUI)
RSKM
Cyclone IV Device Handbook, Volume 1
RSKM
0.5 × TCCS
chapter.
TCCS
6–37

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