EP4CGX75DF27C7N Altera, EP4CGX75DF27C7N Datasheet - Page 147

• Manufacturer Part Number: EP4CGX75DF27C7N
• Description: Cyclone IV GX
• Manufacturer: Altera
• Series: CYCLONE® IV GXr

Specifications of EP4CGX75DF27C7N

• Number Of Logic Elements/cells: 73920
• Number Of Labs/clbs: 4620
• Total Ram Bits: 4257792
• Number Of I /o: 310
• Number Of Gates: -
• Voltage - Supply: 1.16 V ~ 1.24 V
• Mounting Type: *
• Operating Temperature: 0°C ~ 85°C
• Package / Case: *
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 6: I/O Features in Cyclone IV Devices
Software Overview
Software Overview
© December 2010 Altera Corporation
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For PCB layout guidelines, refer to
AN 315: Guidelines for Designing High-Speed FPGA
Cyclone IV devices high-speed I/O system interfaces are created in core logic by a
Quartus II software megafunction because they do not have a dedicated circuit for the
SERDES. Cyclone IV devices use the I/O registers and LE registers to improve the
timing performance and support the SERDES. The Quartus II software allows you to
design your high-speed interfaces using ALTLVDS megafunction. This megafunction
implements either a high-speed deserializer receiver or a high-speed serializer
transmitter. There is a list of parameters in the ALTLVDS megafunction that you can
set to customize your SERDES based on your design requirements. The megafunction
is optimized to use Cyclone IV devices resources to create high-speed I/O interfaces
in the most effective manner.
When you use Cyclone IV devices with the ALTLVDS megafunction, the interface
always sends the MSB of your parallel data first.
For more details about designing your high-speed I/O systems interfaces using the
ALTLVDS megafunction, refer to the
Quartus II
Handbook.
AN 224: High-Speed Board Layout Guidelines
ALTLVDS Megafunction User Guide
PCBs.
Cyclone IV Device Handbook, Volume 1
and the
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