KSZ8893MBLI Micrel Inc, KSZ8893MBLI Datasheet - Page 17

• Manufacturer Part Number: KSZ8893MBLI
• Description: 2+1 Port 10/100 Switch W/ Tranceivers & Frame Buffers ( )
• Manufacturer: Micrel Inc

Specifications of KSZ8893MBLI

• Controller Type: Ethernet Switch Controller
• Interface: MII, RMII, SNI
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFBGA
• Number Of Primary Switch Ports: 3
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Power Supply Type: Analog/Digital
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 3.5V
• Operating Supply Voltage (min): 3.1V
• Operating Temperature Classification: Industrial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / RoHS Status: Not Compliant, Lead free / RoHS Compliant
• Other names: 576-3575

February 2010
Note:
1. I = Input.
Pin Number
100
101
102
103
Pin Name
PS1
PS0
UNUSED
UNUSED
Type
I
I
I
I
(1)
17
Description
Serial bus configuration pins to select mode of access to
KSZ8893MQL internal registers.
[PS1, PS0] = [0, 0] — I
(If EEPROM is not detected, the KSZ8893MQL will be
configured with the default values of its internal registers and
the values of its strap-in pins.)
[PS1, PS0] = [0, 1] — I
The external I
The KSZ8893MQL device addresses are:
1011_1111
1011_1110
[PS1, PS0] = [1, 0] — SPI slave mode
[PS1, PS0] = [1, 1] – SMI-mode
In this mode, the KSZ8893MQL provides access to all its
internal 8-bit registers through its MDC and MDIO pins.
Note:
When (PS1, PS0) ≠ (1,1), the KSZ8893MQL provides access
to its 16-bit MIIM registers through its MDC and MDIO pins.
Unused pins – externally pull up for normal operation
Interface Signals
SPIQ
SCL
SDA
SPIS_N
Interface Signals
SPIQ
SCL
SDA
SPIS_N
Interface Signals
SPIQ
SCL
SDA
SPIS_N
2
<write>
<read>
C master will drive the SCL clock.
Type
O
O
I/O
I
Type
O
I
I/O
I
Type
O
I
I
I
2
2
C master (EEPROM) mode
C slave mode
Description
Not used (tri-stated)
I
I
Not used
Description
Not used (tri-stated)
I
I
Not used
Description
SPI data out
SPI clock
SPI data In
SPI chip select
2
2
2
2
C clock
C data I/O
C clock
C data I/O
M9999-021110-1.6