KSZ8893MBLI Micrel Inc, KSZ8893MBLI Datasheet - Page 23

2+1 Port 10/100 Switch W/ Tranceivers & Frame Buffers ( )

KSZ8893MBLI

Manufacturer Part Number
KSZ8893MBLI
Description
2+1 Port 10/100 Switch W/ Tranceivers & Frame Buffers ( )
Manufacturer
Micrel Inc
Datasheet

Specifications of KSZ8893MBLI

Controller Type
Ethernet Switch Controller
Interface
MII, RMII, SNI
Voltage - Supply
3.1 V ~ 3.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LFBGA
Number Of Primary Switch Ports
3
Operating Supply Voltage (typ)
3.3V
Fiber Support
Yes
Integrated Led Drivers
Yes
Power Supply Type
Analog/Digital
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
3.5V
Operating Supply Voltage (min)
3.1V
Operating Temperature Classification
Industrial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Lead Free Status / RoHS Status
Not Compliant, Lead free / RoHS Compliant
Other names
576-3575

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
KSZ8893MBLI
Manufacturer:
Micrel
Quantity:
2 022
Part Number:
KSZ8893MBLI
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
KSZ8893MBLI
0
February 2010
Ball Number
K7
J8
K8
J9
K9
J10
K10
H10
H9
G9
G10
F9
F10
Ball Name
SMRXD2
SMRXD1
SMRXD0
SCOL
SCRS
SCONF1
SCONF0
MDC
MDIO
SPIQ
SCL
SDA
SPIS_N
Type
Ipd/O
Ipd/O
I/O
I/O
I/O
I
I
I
I/O
O
I/O
I/O
I
(1)
23
Ball Function Description
Switch MII receive data bit 2
Strap option: switch MII is in
Switch MII receive data bit 1
Strap option: Switch MII is in
Switch MII receive data bit 0
Strap option: switch will accept packet size up to
Switch MII collision detect
Switch MII carrier sense
Switch MII interface configuration
MII management interface: clock input
MII management interface: data input/output
Note: an external pull-up is needed on this pin when it is in
use.
SPI slave mode: serial data output
See description in pins 100 and 101.
Note: an external pull-up is needed on this pin when it is in
use.
SPI slave mode / I
I
See description in pins 100 and 101.
SPI slave mode: serial data input
I
See description in pins 100 and 101.
Note: an external pull-up is needed on this pin when it is in
use.
SPI slave mode: chip select (active low)
When SPIS_N is high, the KSZ8893MBL is deselected and
SPIQ is held in high impedance state.
A high-to-low transition is used to initiate SPI data transfer.
See description in pins 100 and 101.
Note: an external pull-up is needed on this pin when it is in
use.
2
2
(SCONF1, SCONF0)
(0,0)
(0,1)
(1,0)
(1,1)
C master mode: clock output
C master/slave mode: serial data input/output
PD (default) = full-duplex mode
PU = half-duplex mode
PD (default) = 100Mbps mode
PU = 10Mbps mode
PD = 1536 bytes (inclusive)
PU = 1522 bytes (tagged), 1518 bytes (untagged)
2
C slave mode: clock input
Description
disable, outputs tri-stated
PHY mode MII
MAC mode MII
PHY mode SNI
M9999-021110-1.6

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