KSZ8893MBLI Micrel Inc, KSZ8893MBLI Datasheet - Page 7

• Manufacturer Part Number: KSZ8893MBLI
• Description: 2+1 Port 10/100 Switch W/ Tranceivers & Frame Buffers ( )
• Manufacturer: Micrel Inc

Specifications of KSZ8893MBLI

• Controller Type: Ethernet Switch Controller
• Interface: MII, RMII, SNI
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFBGA
• Number Of Primary Switch Ports: 3
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Power Supply Type: Analog/Digital
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 3.5V
• Operating Supply Voltage (min): 3.1V
• Operating Temperature Classification: Industrial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / RoHS Status: Not Compliant, Lead free / RoHS Compliant
• Other names: 576-3575

Absolute Maximum Ratings
Operating Ratings
Electrical Characteristics
Reset Timing .................................................................................................................................... 111
Reset Circuit .................................................................................................................................... 112
Selection of Isolation Transformers ............................................................................................... 113
Selection of Reference Crystal ....................................................................................................... 113
Package Information........................................................................................................................ 114
February 2010
EEPROM Timing ................................................................................................................................................................102
SNI Timing..........................................................................................................................................................................103
MII Timing...........................................................................................................................................................................104
RMII Timing ........................................................................................................................................................................106
I2C Slave Mode Timing .....................................................................................................................................................107
SPI Timing..........................................................................................................................................................................108
Auto-Negotiation Timing...................................................................................................................................................110
Register 114 (0x72): MAC Address Register 2 ..............................................................................................................89
Register 115 (0x73): MAC Address Register 3 ..............................................................................................................89
Register 116 (0x74): MAC Address Register 4 ..............................................................................................................89
Register 117 (0x75): MAC Address Register 5 ..............................................................................................................89
Register 118 (0x76): User Defined Register 1 ...............................................................................................................90
Register 119 (0x77): User Defined Register 2 ...............................................................................................................90
Register 120 (0x78): User Defined Register 3 ...............................................................................................................90
Register 121 (0x79): Indirect Access Control 0..............................................................................................................90
Register 122 (0x7A): Indirect Access Control 1 .............................................................................................................90
Register 123 (0x7B): Indirect Data Register 8 ...............................................................................................................90
Register 124 (0x7C): Indirect Data Register 7 ...............................................................................................................91
Register 125 (0x7D): Indirect Data Register 6 ...............................................................................................................91
Register 126 (0x7E): Indirect Data Register 5 ...............................................................................................................91
Register 127 (0x7F): Indirect Data Register 4................................................................................................................91
Register 128 (0x80): Indirect Data Register 3................................................................................................................91
Register 129 (0x81): Indirect Data Register 2................................................................................................................91
Register 130 (0x82): Indirect Data Register 1................................................................................................................91
Register 131 (0x83): Indirect Data Register 0................................................................................................................91
Register 132 (0x84): Digital Testing Status 0.................................................................................................................91
Register 133 (0x85): Digital Testing Control 0 ...............................................................................................................92
Register 134 (0x86): Analog Testing Control 0 ..............................................................................................................92
Register 135 (0x87): Analog Testing Control 1 ..............................................................................................................92
Register 136 (0x88): Analog Testing Control 2 ..............................................................................................................92
Register 137 (0x89): Analog Testing Control 3 ..............................................................................................................92
Register 138 (0x8A): Analog Testing Status..................................................................................................................92
Register 139 (0x8B): Analog Testing Control 4..............................................................................................................92
Register 140 (0x8C): QM Debug 1 ................................................................................................................................92
Register 141 (0x8D): QM Debug 2 ................................................................................................................................92
Static MAC Address Table.............................................................................................................................................93
VLAN Table ...................................................................................................................................................................94
Dynamic MAC Address Table........................................................................................................................................95
MIB (Management Information Base) Counters.............................................................................................................96
Additional MIB Counter Information ...............................................................................................................................98
MAC Mode MII Timing .................................................................................................................................................104
PHY Mode MII Timing..................................................................................................................................................105
Input Timing.................................................................................................................................................................108
Output Timing ..............................................................................................................................................................109
(2)
........................................................................................................................... 99
(1)
............................................................................................................. 100
(1)
........................................................................................................... 99
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M9999-021110-1.6