KSZ8893MBLI Micrel Inc, KSZ8893MBLI Datasheet - Page 54

2+1 Port 10/100 Switch W/ Tranceivers & Frame Buffers ( )

KSZ8893MBLI

Manufacturer Part Number
KSZ8893MBLI
Description
2+1 Port 10/100 Switch W/ Tranceivers & Frame Buffers ( )
Manufacturer
Micrel Inc
Datasheet

Specifications of KSZ8893MBLI

Controller Type
Ethernet Switch Controller
Interface
MII, RMII, SNI
Voltage - Supply
3.1 V ~ 3.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LFBGA
Number Of Primary Switch Ports
3
Operating Supply Voltage (typ)
3.3V
Fiber Support
Yes
Integrated Led Drivers
Yes
Power Supply Type
Analog/Digital
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
3.5V
Operating Supply Voltage (min)
3.1V
Operating Temperature Classification
Industrial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Lead Free Status / RoHS Status
Not Compliant, Lead free / RoHS Compliant
Other names
576-3575

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
KSZ8893MBLI
Manufacturer:
Micrel
Quantity:
2 022
Part Number:
KSZ8893MBLI
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
KSZ8893MBLI
0
Loopback Support
The KSZ8893MQL/MBL provides loopback support for remote diagnostic of failure. In loopback mode, the speed
at both PHY ports needs to be set to 100BASE-TX. Two types of loopback are supported: Far-end Loopback
and Near-end (Remote) Loopback.
Far-end Loopback
Far-end loopback is conducted between the KSZ8893MQL/MBL’s two PHY ports. The loopback path starts at the
“Originating.” PHY port’s receive inputs (RXP/RXM), wraps around at the “loopback” PHY port’s PMD/PMA, and
ends at the “Originating” PHY port’s transmit outputs (TXP/TXM).
Bit [0] of registers 29 and 45 is used to enable far-end loopback for ports 1 and 2, respectively. Alternatively, the
MII Management register 0, bit [14] can be used to enable far-end loopback.
The far-end loopback path is illustrated in the following figure.
February 2010
R X P /
R X M
Figure 12: Far-End Loopback Path
P M D /P M A
P M D /P M A
S w itc h
O riginating
L oop B ack
P H Y P o rt
P H Y P o rt
M A C
M A C
P C S
P C S
54
T X P /
T X M
M9999-021110-1.6

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