LAN9312-NZW SMSC, LAN9312-NZW Datasheet - Page 117
![Ethernet ICs Hi Per 2 Port 10/100 Ethernet Switch](/photos/27/13/271362/lan9312_sml.jpg)
LAN9312-NZW
Manufacturer Part Number
LAN9312-NZW
Description
Ethernet ICs Hi Per 2 Port 10/100 Ethernet Switch
Manufacturer
SMSC
Type
Two Port Managed Ethernet Switchr
Datasheet
1.LAN9312-NZW.pdf
(458 pages)
Specifications of LAN9312-NZW
Ethernet Connection Type
10 Base-T, 100 Base-TX
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Product
Ethernet Switches
Number Of Transceivers
1
Standard Supported
802.3, 802.3u
Data Rate
10 Mbps, 100 Mbps
Supply Voltage (max)
3.3 V
Supply Voltage (min)
0 V
Supply Current (max)
186 mA, 295 mA
Maximum Operating Temperature
+ 70 C
Package / Case
TQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LAN9312-NZW
Manufacturer:
Standard
Quantity:
143
Company:
Part Number:
LAN9312-NZW
Manufacturer:
Microchip Technology
Quantity:
10 000
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High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312
Reserved
FIELD
FIELD
30:0
2:1
31
3
0
Filter 3 Offset
The Filter i Byte Mask defines which incoming frame bytes Filter i will examine to determine whether
or not this is a wake-up frame.
The Filter i command register controls Filter i operation.
DESCRIPTION
Must be zero (0)
Byte Mask: If bit j of the byte mask is set, the CRC machine processes byte number pattern - (offset
+ j) of the incoming frame. Otherwise, byte pattern - (offset + j) is ignored.
DESCRIPTION
Address Type: Defines the destination address type of the pattern. When bit is set, the pattern
applies only to multicast frames. When bit is cleared, the pattern applies only to unicast frames.
RESERVED
Enable Filter: When bit is set, Filter i is enabled, otherwise, Filter i is disabled.
Command
Filter 3
Filter 1 CRC-16
Filter 3 CRC-16
Table 9.2 Wake-Up Frame Filter Register Structure
Reserved
Table 9.3 Filter i Byte Mask Bit Definitions
Table 9.4 Filter i Command Bit Definitions
Filter 2 Offset
FILTER I BYTE MASK DESCRIPTION
Command
Table
FILTER i COMMANDS
Filter 2
Filter 0 Byte Mask
Filter 1 Byte Mask
Filter 2 Byte Mask
Filter 3 Byte Mask
DATASHEET
9.3, describes the byte mask’s bit fields.
117
Reserved
Filter 1Offset
Table 9.4
Command
Filter 1
Filter 0 CRC-16
Filter 2 CRC-16
shows the Filter i command register.
Reserved
Filter 0 Offset
Revision 1.7 (06-29-10)
Command
Filter 0
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