LAN9312-NZW SMSC, LAN9312-NZW Datasheet - Page 44

• Manufacturer Part Number: LAN9312-NZW
• Description: Ethernet ICs Hi Per 2 Port 10/100 Ethernet Switch
• Manufacturer: SMSC
• Type: Two Port Managed Ethernet Switchr

Specifications of LAN9312-NZW

• Ethernet Connection Type: 10 Base-T, 100 Base-TX
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Product: Ethernet Switches
• Number Of Transceivers: 1
• Standard Supported: 802.3, 802.3u
• Data Rate: 10 Mbps, 100 Mbps
• Supply Voltage (max): 3.3 V
• Supply Voltage (min): 0 V
• Supply Current (max): 186 mA, 295 mA
• Maximum Operating Temperature: + 70 C
• Package / Case: TQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Revision 1.7 (06-29-10)
STRAP NAME
speed_strap_2
duplex_strap_2
BP_EN_strap_2
FD_FC_strap_2
Table 4.2 Soft-Strap Configuration Strap Definitions (continued)
DESCRIPTION
Port 2 Speed Select Strap: Configures the default value
for the
the PHY_BASIC_CTRL_2 register (See
When configured low, 10 Mbps is selected. When
configured high, 100 Mbps is selected.
This strap also affects the default value of the following bits:
Refer to the respective register definition sections for
additional information.
Port 2 Duplex Select Strap: Configures the default value
for the
PHY_BASIC_CTRL_2 register (See
When configured low, half-duplex is selected. When
configured high, full-duplex is selected.
This strap also affects the default value of the following bits:
Refer to the respective register definition sections for
additional information.
Port 2 Backpressure Enable Strap: Configures the
default value for the
(BP_EN_2)
(MANUAL_FC_2). When configured low, backpressure is
disabled. When configured high, backpressure is enabled.
Port 2 Full-Duplex Flow Control Enable Strap:
Configures the default value of the
Transmit Flow Control Enable (TX_FC_2)
Duplex Receive Flow Control Enable (RX_FC_2)
Port 2 Manual Flow Control Register
which are used when manual full-duplex control is selected.
When configured low, full-duplex Pause packet detection
and generation are disabled. When configured high, full-
duplex Pause packet detection and generation are enabled.
PHY_SPEED_SEL_LSB bit of the
Control Register (PHY_BASIC_CONTROL_x)
10BASE-T Full Duplex (bit 6) and 10BASE-T Half Duplex
(bit 5) bits of the
Advertisement Register (PHY_AN_ADV_x)
MODE[2:0] bits of the
(PHY_SPECIAL_MODES_x)
PHY_DUPLEX bit of the
Register (PHY_BASIC_CONTROL_x)
10BASE-T Full Duplex (bit 6) of the
Negotiation Advertisement Register (PHY_AN_ADV_x)
MODE[2:0] bits of the
(PHY_SPECIAL_MODES_x)
Speed Select LSB (PHY_SPEED_SEL_LSB)
Duplex Mode (PHY_DUPLEX)
High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
bit of the
DATASHEET
Port x PHY Auto-Negotiation
Port 2 Backpressure Enable
Port 2 Manual Flow Control Register
Port x PHY Special Modes Register
Port x PHY Special Modes Register
44
Port x PHY Basic Control
Port 2 Full-Duplex
Port x PHY Basic
Section
(MANUAL_FC_2),
bit in the
Port x PHY Auto-
Section
and
14.4.2.1).
Port 2 Full-
14.4.2.1).
bits in the
bit in
PIN / DEFAULT
VALUE
1b
1b
1b
1b
SMSC LAN9312
Datasheet