LAN9312-NZW SMSC, LAN9312-NZW Datasheet - Page 269

Ethernet ICs Hi Per 2 Port 10/100 Ethernet Switch

LAN9312-NZW

Manufacturer Part Number
LAN9312-NZW
Description
Ethernet ICs Hi Per 2 Port 10/100 Ethernet Switch
Manufacturer
SMSC
Type
Two Port Managed Ethernet Switchr
Datasheet

Specifications of LAN9312-NZW

Ethernet Connection Type
10 Base-T, 100 Base-TX
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Product
Ethernet Switches
Number Of Transceivers
1
Standard Supported
802.3, 802.3u
Data Rate
10 Mbps, 100 Mbps
Supply Voltage (max)
3.3 V
Supply Voltage (min)
0 V
Supply Current (max)
186 mA, 295 mA
Maximum Operating Temperature
+ 70 C
Package / Case
TQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
LAN9312-NZW
Manufacturer:
Standard
Quantity:
143
Part Number:
LAN9312-NZW
Manufacturer:
Microchip Technology
Quantity:
10 000
High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312
14.3
INDEX #
0Dh-FFh
0Ch
0Ah
0Bh
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
This section details the Host MAC System CSR’s. These registers are located in the Host MAC and
are accessed indirectly via the HBI system CSR’s.
accessible through the indexing method using the
(MAC_CSR_CMD)
The Host MAC registers allow configuration of the various Host MAC parameters including the Host
MAC address, flow control, multicast hash table, and wake-up configuration. The Host MAC CSR’s
also provide serial access to the PHYs via the registers HMAC_MII_ACC and HMAC_MII_DATA.
These registers allow access to the 10/100 Ethernet PHY registers and the switch engine (via Port 0).
Host MAC Control and Status Registers
HMAC_MII_DATA
HMAC_MII_ACC
HMAC_WUCSR
HMAC_ADDRH
HMAC_HASHH
HMAC_ADDRL
HMAC_HASHL
HMAC_VLAN1
HMAC_VLAN2
HMAC_FLOW
HMAC_WUFF
RESERVED
RESERVED
HMAC_CR
SYMBOL
and
Table 14.6 Host MAC Adressable Registers
Host MAC CSR Interface Data Register
DATASHEET
Host MAC Control Register,
Host MAC Address High Register,
Host MAC Multicast Hash Table High Register,
Host MAC Multicast Hash Table Low Register,
Host MAC MII Data Register,
Host MAC Flow Control Register,
Host MAC VLAN1 Tag Register,
Host MAC VLAN2 Tag Register,
Host MAC Wake-up Frame Filter Register,
Section 14.3.12
Reserved for Future Use
Reserved for Future Use
Host MAC Address Low Register,
Host MAC MII Access Register,
Host MAC Wake-up Control and Status Register,
269
Host MAC CSR Interface Command Register
Table 14.6
REGISTER NAME
(MAC_CSR_DATA).
Section 14.3.1
lists Host MAC registers that are
Section 14.3.7
Section 14.3.6
Section 14.3.9
Section 14.3.10
Section 14.3.8
Section 14.3.3
Section 14.3.2
Section 14.3.11
Revision 1.7 (06-29-10)
Section 14.3.5
Section 14.3.4

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