XC5VSX95T-2FF1136I Xilinx Inc, XC5VSX95T-2FF1136I Datasheet - Page 197
![FPGA Virtex®-5 Family 94208 Cells 65nm (CMOS) Technology 1V 1136-Pin FCBGA](/photos/6/73/67306/xilinx-_1136-fbga_sml.jpg)
XC5VSX95T-2FF1136I
Manufacturer Part Number
XC5VSX95T-2FF1136I
Description
FPGA Virtex®-5 Family 94208 Cells 65nm (CMOS) Technology 1V 1136-Pin FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 SXTr
Datasheets
1.XC5VLX30-1FFG324C.pdf
(91 pages)
2.XC5VLX30-1FFG324C.pdf
(13 pages)
3.XC5VLX30-1FFG324C.pdf
(385 pages)
Specifications of XC5VSX95T-2FF1136I
Package
1136FCBGA
Family Name
Virtex®-5
Device Logic Units
94208
Typical Operating Supply Voltage
1 V
Maximum Number Of User I/os
640
Ram Bits
8994816
Number Of Logic Elements/cells
94208
Number Of Labs/clbs
7360
Total Ram Bits
8994816
Number Of I /o
640
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1136-BBGA, FCBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
HW-AFX-FF1136-500-G - BOARD DEV VIRTEX 5 FF1136
Number Of Gates
-
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC5VSX95T-2FF1136I
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XC5VSX95T-2FF1136I
Manufacturer:
XILXIN
Quantity:
20 000
- XC5VLX30-1FFG324C PDF datasheet
- XC5VLX30-1FFG324C PDF datasheet #2
- XC5VLX30-1FFG324C PDF datasheet #3
- XC5VLX30T-1FFG665C_PRODUCT_CHANGE PDF datasheet #4
- Current page: 197 of 385
- Download datasheet (14Mb)
X-Ref Target - Figure 5-22
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
SEL D [1:0], DATA D [3:0]
SEL C [1:0], DATA C [3:0]
SEL B [1:0], DATA B [3:0]
SEL A [1:0], DATA A [3:0]
8:1 Multiplexer
Each slice has an F7AMUX and an F7BMUX. These two muxes combine the output of two
LUTs to form a combinatorial function up to 13 inputs (or an 8:1 MUX). Up to two 8:1
MUXes can be implemented in a slice, as shown in
SELF7(1)
SELF7(2)
Input (1)
Input (1)
Input (2)
Input (2)
CLK
Figure 5-22: Two 8:1 Multiplexers in a Slice
(D[6:1])
(C[6:1])
(B[6:1])
(A[6:1])
(CLK)
(CX)
(AX)
6
6
6
6
A[6:1]
A[6:1]
A[6:1]
A[6:1]
www.xilinx.com
LUT
LUT
LUT
LUT
O6
O6
O6
O6
SLICE
F7BMUX
F7AMUX
Figure
(Optional)
(Optional)
D Q
D Q
(CMUX)
(AMUX)
5-22.
(CQ)
(AQ)
UG190_5_22_090806
8:1 MUX
Output (1)
Registered
Output
8:1 MUX
Output (2)
Registered
Output
CLB Overview
197
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