LAN9311-NZW Standard Microsystems (SMSC), LAN9311-NZW Datasheet - Page 167
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LAN9311-NZW
Manufacturer Part Number
LAN9311-NZW
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LAN9311-NZW.pdf
(460 pages)
Specifications of LAN9311-NZW
Number Of Primary Switch Ports
2
Internal Memory Buffer Size
32
Operating Supply Voltage (typ)
3.3V
Fiber Support
No
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII
Power Supply Type
Analog
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Operating Temperature Classification
Commercial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LAN9311-NZW
Manufacturer:
Standard
Quantity:
2
Company:
Part Number:
LAN9311-NZW
Manufacturer:
Microchip Technology
Quantity:
10 000
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Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
Chapter 14 Register Descriptions
SMSC LAN9311/LAN9311i
This section describes the various LAN9311/LAN9311i control and status registers (CSR’s). These
registers are broken into 5 categories. The following sections detail the functionality and accessibility
of all the LAN9311/LAN9311i registers within each category:
Figure 14.1
map is not drawn to scale, and should be used for general reference only.
Note: Register bit type definitions are provided in
Note: Not all LAN9311/LAN9311i registers are memory mapped or directly addressable. For details
Section 14.1, "TX/RX FIFO Ports," on page 168
Section 14.2, "System Control and Status Registers," on page 169
Section 14.3, "Host MAC Control and Status Registers," on page 271
Section 14.4, "Ethernet PHY Control and Status Registers," on page 287
Section 14.5, "Switch Fabric Control and Status Registers," on page 309
on the accessibility of the various LAN9311/LAN9311i registers, refer the register sub-sections
listed above.
contains an overall base register memory map of the LAN9311/LAN9311i. This memory
Figure 14.1 LAN9311/LAN9311i Base Register Memory Map
Base + 000h
3FFh
2E0h
2DCh
200h
1DCh
1C0h
1B0h
1ACh
19Ch
100h
0A8h
0A4h
050h
04Ch
048h
044h
040h
03Ch
020h
01Ch
...
...
DATASHEET
Host MAC Interface Registers
Switch Interface Registers
Switch CSR Direct Data
Virtual PHY Registers
RX Status FIFO PEEK
TX Status FIFO PEEK
RESERVED
RX Status FIFO Port
TX Status FIFO Port
TX Data FIFO Port
RX Data FIFO Port
1588 Registers
& Alias Ports
& Alias Ports
Registers
167
Section 1.3, "Register Nomenclature," on page
Revision 1.7 (06-29-10)
19.
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