L-ET4148-50C-DB LSI, L-ET4148-50C-DB Datasheet - Page 212

• Manufacturer Part Number: L-ET4148-50C-DB
• Manufacturer: LSI

Specifications of L-ET4148-50C-DB

• Lead Free Status / RoHS Status: Supplier Unconfirmed

ET4148-50
Single-Chip 48 x 1 Gbit/s + 2 x 10 Gbits/s Layer 2+ Ethernet Switch
Appendix A: Registers
Priority_Decode_Table_{5..6}
Description: Decodes the 4-bit encoded priority value prior to transmission.
Table 293. Priority_Decode_Table_{5..6} Register Parameters
Table 294. Priority_Decode_Table_{5..6} Field Parameters
During packet reception, a 4-bit priority value is assigned to each packet. During packet transmission, this table is
used to convert that 4-bit priority value back to either a 3-bit CoS field (for use in the VLAN tag) or a 6-bit DSCP
value (for use in the IP header). This table is addressed by the concatenation of the packet’s demote status and its
priority value computed during ingress processing.
212
Base Address
Register Size
Register Instances
Register Spacing
Record Size
Record Instances
Record Spacing
dscp_{}{0..31}[5:0]
cos_{}{0..31}[2:0]
0
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
0
Field Name
Parameter
1
2
REFERENCE
3
4
PORT
Figure 222. Priority_Decode_Table_{5..6} Register Diagram
5
6
XG1
7
60
(continued)
8
XG0
50
Figure 223. Port Numbering Scheme
9
SU1
49
10
Instances = 1
Instances = 1
Offset = 0.18
Offset = 0.29
Mode = R/W
Mode = R/W
Parameters
G = 10/100/1000 Mbits/s PORT
XG = 10 Gbits/s PORT
SU = SUPERVISOR
PORT NUMBERING SCHEME
Agere Systems - Proprietary
11
SU0
0x0007_5f00
48
12
32768
Value
G47
128
47
13
32
2
4
4
14
G46
46
15
G45
45
16
17
The decoded DSCP value.
The decoded CoS value.
G44
44
18
19
dscp[5:0]
20
21
22
G3
3
23
8
Description
G2
2
24
7
25
Preliminary Data Sheet
6
G1
1
26
5
G0
0
27
4
Agere Systems Inc.
28
3
29
2
cos[2:0]
30
1
April 2006
31
0