L-ET4148-50C-DB LSI, L-ET4148-50C-DB Datasheet - Page 216

• Manufacturer Part Number: L-ET4148-50C-DB
• Manufacturer: LSI

Specifications of L-ET4148-50C-DB

• Lead Free Status / RoHS Status: Supplier Unconfirmed

ET4148-50
Single-Chip 48 x 1 Gbit/s + 2 x 10 Gbits/s Layer 2+ Ethernet Switch
Appendix A: Registers
Rx_Error_Packets
Description: Statistics counters.
Table 301. Rx_Error_Packets Register Parameters
Table 302. Rx_Error_Packets Field Parameters
216
Base Address
Register Size
Register Instances
Register Spacing
Record Size
Record Instances
Record Spacing
rx_alignment_error_packets[21:0]
rx_crc_error_packets[21:0]
rx_code_error_packets[21:0]
rx_fragment_packets[21:0]
12
0
4
8
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
0
Parameter
Field Name
1
2
3
4
5
6
7
Figure 230. Rx_Error_Packets Register Diagram
(continued)
8
0x0004_5800
9
Value
10
800
800
NA
NA
Spacing = 16.0
Spacing = 16.0
Spacing = 16.0
Spacing = 16.0
Instances = 50
Instances = 50
Instances = 50
Instances = 50
Offset = 12.10
1
1
Offset = 0.10
Offset = 4.10
Offset = 8.10
Mode = R/W
Mode = R/W
Mode = R/W
Mode = R/W
Parameters
Agere Systems - Proprietary
11
12
13
14
15
16
rx_alignment_error_packets[21:0]
The number of packets received with an alignment
error (bad CRC and dribble bits) that are at least
64 bytes in length.
The number of packets received with an CRC error,
no dribble bits, and are at least 64 bytes in length.
The number of packets received with a CRC error
and a code error. These packets do not have drib-
ble bits and are at least 64 bytes in length.
The number of packets received with a CRC error
and are less than 64 bytes in length. Code errors
and dribble bits may also be present.
17
rx_code_error_packets[21:0]
rx_crc_error_packets[21:0]
rx_fragment_packets[21:0]
18
19
20
21
22
23
8
Description
24
7
Preliminary Data Sheet
25
6
26
5
27
4
Agere Systems Inc.
28
3
29
2
April 2006
30
1
31
0