L-ET4148-50C-DB LSI, L-ET4148-50C-DB Datasheet - Page 243

• Manufacturer Part Number: L-ET4148-50C-DB
• Manufacturer: LSI

Specifications of L-ET4148-50C-DB

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Preliminary Data Sheet
April 2006
Agere Systems Inc.
Appendix A: Registers
Supervisor_Statistics_Transfer_Addr
Description: Defines the starting address of the statistics transfer destination.
Table 340. Supervisor_Statistics_Transfer_Addr Register Parameters
Table 341. Supervisor_Statistics_Transfer_Addr Field Parameters
This register is used to define the starting location of a block of memory in the supervisor’s address space that is
used as the destination for Ethernet MAC statistics block transfers. The actual transfer of statistics data is initiated
by writing to this register.
Base Address
Register Size
Register Instances
Register Spacing
Record Size
Record Instances
Record Spacing
statistics_transfer_addr[31:2]
0
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
0
Field Name
Parameter
1
2
3
Figure 256. Supervisor_Statistics_Transfer_Addr Register Diagram
4
5
6
Single-Chip 48 x 1 Gbit/s + 2 x 10 Gbits/s Layer 2+ Ethernet Switch
(continued)
7
8
9
Agere Systems - Proprietary
10
Instances = 1
Mode = R/W
Parameters
Offset = 0.0
11
statistics_transfer_addr[31:2]
12
0x000c_c46c
13
Value
14
NA
NA
4
1
4
1
15
16
Defines the location within supervisor memory to
where the Ethernet MAC statistics block is to be
transferred.
17
18
19
20
21
22
23
Description
8
24
7
25
6
26
5
27
4
28
3
29
2
ET4148-50
30
1
0
31
0
0
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