L-ET4148-50C-DB LSI, L-ET4148-50C-DB Datasheet - Page 48

• Manufacturer Part Number: L-ET4148-50C-DB
• Manufacturer: LSI

Specifications of L-ET4148-50C-DB

• Lead Free Status / RoHS Status: Supplier Unconfirmed

ET4148-50
Single-Chip 48 x 1 Gbit/s + 2 x 10 Gbits/s Layer 2+ Ethernet Switch
Data Structures
Supervisor_Rx_Packet
Description: The form of received packets in supervisor memory space.
Table 9. Supervisor_Rx_Packet Register Parameters
48
Base Address
Structure Size
Structure Instances
Structure Spacing
0
4
8
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
0
Parameter
1
vlan_index[7:0]
2
3
4
5
(continued)
6
7
One 32-bit word after the previous Supervisor_Rx_Packet
Variable
Variable
Variable
8
priority[3:0]
Figure 23. Supervisor_Rx_Packet Data Structure
9
packet_data{0..(packet_length[13:0] – 1)}
10
11
Agere Systems - Proprietary
12
packet_start_ptr[31:2]
13
rx_port[5:0]
14
15
16
Value
17
18
19
20
21
packet_length[13:0]
22
23
8
24
7
25
6
Preliminary Data Sheet
26
5
27
4
28
3
Agere Systems Inc.
29
2
30
1
April 2006
31
0