L-ET4148-50C-DB LSI, L-ET4148-50C-DB Datasheet - Page 278

• Manufacturer Part Number: L-ET4148-50C-DB
• Manufacturer: LSI

Specifications of L-ET4148-50C-DB

• Lead Free Status / RoHS Status: Supplier Unconfirmed

ET4148-50
Single-Chip 48 x 1 Gbit/s + 2 x 10 Gbits/s Layer 2+ Ethernet Switch
Appendix B: Configuration
Bridging
Packet Flooding
According to the IEEE 802.1d standard, a packet whose destination address is unknown (i.e., not present in the
Layer 2 address table) must be flooded to all potential destination ports. If a destination address look-up results in
a look-up failure, then the port map contained in Layer_2_Flood_Map is used as the initial destination port map
rather than a value from Layer_2_Dest_Map_Table. The flood map is subject to pruning by such functions as
VLANs.
Address Learning
If the look-up on the receive packet’s source address indicates that the value is not present in the Layer 2 address
table, then the learning of the source address value is called for. The supervisor is responsible for carrying out the
actual addition of the address value to the Layer 2 address table. The ET4148-50 merely recognizes that a particu-
lar source address is unknown, forwards a copy of the packet to the supervisor, and then allows the supervisor to
determine where (if anywhere) in the table the entry belongs.
The supervisor queue designated to be the learning queue is specified via the Layer_2_Learning_Port register.
Ports 50 through 57 correspond to the supervisor’s eight receive queues.
Note: Each supervisor queue may be independently configured to truncate receive packets. This feature may be
Layer 2 Access Control
Each Layer 2 address table entry includes an access control flag bit as part of an address value’s associated data.
This flag bit acts as an access control indicator. The flag is examined when the address being submitted for a look-
up is a source address. Namely, this flag is the layer_2_src_permit_{0..1} bits of the
Layer_2_Key_Table_6 register. There is one flag for key 0 and one for key 1 in each record.
If the flag bit for a particular source address is deasserted, the affected receive packet is denied access to the
device. This denial does not necessarily imply that the packet is discarded. Rather, the mask stored in
Layer_2_Src_Deny_Mask is applied to the destination map for the packet. Certain destinations such as supervisor
queues may remain enabled for logging or other purposes.
Access control based on a packet’s destination address is simply a matter of using a
layer_2_dest_map_index_{0..1}[8:0] value in Layer_2_Key_Table_6 that points to a destination map
whose pattern of asserted bits is appropriate for a Layer 2 denial (e.g., all bits deasserted).
Spanning Tree States
The IEEE 802.1d spanning tree protocol requires that the various ports transition through a series of states; each
state implying a certain per-port behavior. These states are listed in the following table.
Table 382. Spanning Tree states
.Note: Operationally, there is no real difference between the blocking and listening states. Hence, they are com-
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beneficial for the address learning function if packet data beyond the MAC header is of no interest to the
supervisor.
bined into a single state called blocking for the purposes of explaining how to configure the ET4148-50
Forwarding
Listening
Disabled
Learning
Blocking
(continued)
State
(continued)
Receive?
Yes
Yes
Yes
Yes
No
Agere Systems - Proprietary
Learn?
Yes
Yes
No
No
No
Preliminary Data Sheet
Forward?
Agere Systems Inc.
Yes
No
No
No
No
April 2006