PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 324

• Manufacturer Part Number: PSB21473FV13XT
• Manufacturer: Infineon Technologies

Specifications of PSB21473FV13XT

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / RoHS Status: Compliant

Data Sheet
RFBS
RFBS
Bit6
0
0
1
1
Note: A change of RFBS will take effect after a receiver command (CMDR.RMC,
SRA
0: Receive Address is not stored in the RFIFO
1: Receive Address is stored in the RFIFO
XCRC
0: CRC is transmitted
1: CRC is not transmitted
RCRC
0: CRC is not stored in the RFIFO
1: CRC is stored in the RFIFO
ITF
Selects the inter-frame time fill signal which is transmitted between HDLC-frames.
0: Idle (continuous ’1’)
1: Flags (sequence of patterns: ‘0111 1110’)
Note: ITF must be set to ’0’ for power down mode. In applications with D-channel access
CMDR.RRES,) has been written
handling (collision resolution), the only possible inter-frame time fill is idle
(continuous ’1’). Otherwise the D-channel on the line interface can not be
accessed
RFBS
Bit5
0
1
0
1
… Store Receive Address
… Transmit CRC
… Receive CRC
… Interframe Time Fill
Block Size
Receive FIFO
32 byte
16 byte
8 byte
4 byte
Receive FIFO Block Size
IOM-2 Handler, TIC/CI Handler and HDLC Controller
324
PSB 21473
2003-03-31
INCA-D