PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 70

• Manufacturer Part Number: PSB21473FV13XT
• Manufacturer: Infineon Technologies

Specifications of PSB21473FV13XT

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / RoHS Status: Compliant

Data Sheet
ZEROS (FF1C
The Constant Ones Register ONES
All bits of this bit-addressable register are fixed to '1' by hardware. This register can be
read only. Register ONES can be used as a register-addressable constant of all ones,
ie. for bit manipulation or mask generation. It can be accessed via any instruction, which
is capable of addressing an SFR.
ONES (FF1E
6.3
Introduction
Compared to existing C16x architecture, the PEC transfer function is enhanced by
extended functionality. For information regarding the general PEC transfer refer to the
interrupt description.
However, the extended PEC function is a further step into DMA control functionality. It
especially supports integrated system design with XBUS as system bus.
The extended PEC functions are defined as follows:
– Source pointer and destination pointer are extended to 24-bit pointer, thus enabling
– Two of the PEC channels are expanded by additional 16-bit transfer count registers;
– For always two channels a chaining feature is provided. When enabled in the PEC
15
r
15
r
0
1
PEC controlled data transfer between any two locations within the total address
space. Both 8-bit segment numbers of every source/destination pointer pair are
defined in one 16-bit SFR register; thus, 8 PEC segment number registers are
available for the 8 PEC channels.
when enabled, the original 8-bit bytecount in the control register serves as package
length count, thus defining the amount of bytes or words to be transferred with one
request. In INCA-D the package size is always limited to one transfer.
control register, a termination interrupt of one channel will automatically switch
transfer control to the other channel of the channel pair.
14
r
14
r
0
1
PEC - Extension of Functionality
13
r
13
r
H
0
1
H
/ 8F
/ 8E
H
12
r
12
r
)
0
1
H
)
11
r
11
r
0
1
10
r
10
r
0
1
9
r
9
r
0
1
8
r
8
r
0
1
SFR
SFR
70
7
r
7
r
0
1
6
r
6
r
0
1
5
r
5
r
0
1
4
r
4
r
0
1
Central Processor Unit
3
r
3
r
Reset Value: 0000
0
Reset Value: FFFF
1
2
r
2
r
0
1
PSB 21473
1
r
1
r
2003-03-31
0
1
INCA-D
0
r
0
r
0
1
H
H