PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 46

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PSB21473FV13XT

Manufacturer Part Number
PSB21473FV13XT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB21473FV13XT

Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Lead Free Status / RoHS Status
Compliant
Data Sheet
Note: Writing to any byte of an SFR causes the non-addressed complementary byte to
The upper half of each register block is bit-addressable, so the respective control/status
bits can directly be modified or checked using bit addressing.
5.9
The INCA-D is capable to address 4 MBytes of external memory space (for each chip
select).
This external memory is accessed via the INCA-D’s external bus interface.
Four memory bank sizes are supported:
• Non-segmented mode: 64 KBytes with A15...A0 on PORT0 or PORT1
• 2-bit segmented mode: 256 KByteswith A17...A16 on Port 4 and A15...A0 on PORT0 or PORT1
• 4-bit segmented mode: 1 MBytes with A19...A16 on Port 4 and A15...A0 on PORT0 or PORT1
• 6-bit segmented mode: 4 MBytes with A21...A16 on Port 4 and A15...A0 on PORT0 or PORT1
Each bank can be directly addressed via the address bus, while the programmable chip
select signals can be used to select various memory banks.
The INCA-D also supports four different bus types:
• Multiplexed 16-bit Bus with address and data on PORT0
• Multiplexed 8-bit Bus with address and data on PORT0 or P0L(pins 0-7 of Port0
• Demultiplexed 16-bit Bus with address on PORT1 and data on PORT0
• Demultiplexed 8-bit Bus with address on PORT1 and data on P0L (Default after
Memory model and bus mode are selected during reset by PORT0 pins. (For further
details refer to Chapter ’The External Bus Interface’)
Please note that the external memory size of segment 0 is limited to the lower 56 KBytes.
If the program code exceeds this boundary, it has to be continued in segment 1.
Note: When operating in non-segmented mode only addresses from 00’0000
The different memory areas must be switched explicitly via branch instructions.
Sequential boundary crossing is not supported and leads to erroneous results.
External word and byte data can only be accessed via indirect or long 16-bit addressing
modes using one of the four DPP registers. There is no short addressing mode for
external operands. Any word data access is made to an even byte address.
For PEC data transfers the external memory can be accessed independent of the
contents of the DPP registers via the PEC source and destination pointers.
The external memory is not provided for single bit storage and therefore it is not bit
addressable.
)respectively
Reset)
be cleared!
00’CFFF
External Memory Space
H
can be used for external memory access.
46
Memory Organization
PSB 21473
2003-03-31
INCA-D
H
to

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