PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 53

• Manufacturer Part Number: PSB21473FV13XT
• Manufacturer: Infineon Technologies

Specifications of PSB21473FV13XT

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / RoHS Status: Compliant

Note: Only exception: bit VISIBLE can also be changed by the on-chip debug support
System Clock Output Enable (CLKEN)
The system clock output function is enabled by setting bit CLKEN in register SYSCON
to '1'. If enabled, port pin P3.15 takes on its alternate function as CLKOUT output pin.
The clock output is a 50 % duty cycle clock whose frequency equals the CPU operating
frequency (f
Note: The output driver of port pin P3.15 is switched on automatically, when the
Note: The implemented pad type for CLKOUT supports only an open-drain output driver
Segmentation Disable/Enable Control (SGTDIS)
Bit SGTDIS allows to select either the segmented or non-segmented memory mode.
In non-segmented memory mode (SGTDIS='1') it is assumed that the code address
space is restricted to 64 KBytes (segment 0) and thus 16 bits are sufficient to represent
all code addresses. For implicit stack operations (CALL or RET) the CSP register is
totally ignored and only the IP is saved to and restored from the stack.
In segmented memory mode (SGTDIS='0') it is assumed that the whole address space
is available for instructions. For implicit stack operations (CALL or RET) the CSP register
and the IP are saved to and restored from the stack. After reset the segmented memory
mode is selected.
Note: Bit SGTDIS controls if the CSP register is pushed onto the system stack in addition
System Stack Size (STKSZ)
This bitfield defines the size of the physical system stack, which is located in the internal
RAM of the INCA-D. An area of 32...1024 words may be dedicated to the system stack.
A so-called “circular stack” mechanism allows to use a bigger virtual stack than this
dedicated RAM area.
The Processor Status Word PSW
This bit-addressable register reflects the current state of the microcontroller. Two groups
of bits represent the current ALU status, and the current CPU interrupt status. A separate
bit (USR0) within register PSW is provided as a general purpose user flag.
Data Sheet
with DPEC access.
CLKOUT function is enabled. The port direction bit is disgarded.
After reset, the clock output function is disabled (CLKEN = ‘0’).
to the IP register before an interrupt service routine is entered, and it is repopped
when the interrupt service routine is left again.
OUT
= f
CPU
).
53
Central Processor Unit
PSB 21473
2003-03-31
INCA-D