PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 625

• Manufacturer Part Number: PSB21473FV13XT
• Manufacturer: Infineon Technologies

Specifications of PSB21473FV13XT

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / RoHS Status: Compliant

Physical
Addr
F11C
F11E
F122
F124
F126
F128
F12C
F12E
F180
F194
F19C
F1C0
F1C2
F1C6
F1CA
F1CE
F1D0
F1D2
F1D4
F1D6
F1D8
F1DA
F1DC
F1DE
FE00
FE02
FE04
FE06
FE08
FE0A
FE0C
FE0E
FE10
FE12
FE14
Data Sheet
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Register
Name
reserved
reserved
P2ALTSEL0
P2HALTSEL1
P3ALTSEL0
P3ALTSEL1
P6ALTSEL0
P7ALTSEL0
PECCLIC
ICINTEIC
S0TBIC
EXICON
ODP2
ODP3
ODP4
ODP6
reserved
ODP7
reserved
reserved
reserved
reserved
reserved
ISNC
DPP0
DPP1
DPP2
DPP3
CSP
reserved
MDH
MDL
CP
SP
STKOV
Type
ESFR-b
ESFR-b
ESFR
ESFR
ESFR
ESFR
ESFR
ESFR
ESFR-b
SFR-b
ESFR-b
ESFR-b
ESFR-b
ESFR-b
ESFR-b
ESFR-b
ESFR-b
ESFR-b
ESFR-b
ESFR-b
ESFR-b
ESFR-b
ESFR-b
ESFR-b
SFR
SFR
SFR
SFR
SFR
SFR
SFR
SFR
SFR
SFR
SFR
8-bit
Addr
8E
8F
91
92
93
94
96
97
C0
CA
CE
E0
E1
E3
E5
E7
E8
E9
EA
EB
EC
ED
EE
EF
00
01
02
03
04
05
06
07
08
09
0A
H
H
H
H
H
H
H
H
H
H
H
H
H
H
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Description
Alternate Function Enable Port 2
Second Alternate Function Enable Port 2
Alternate Function Enable Port 3
Second Alternate Function Enable Port 3
Alternate Function Enable Port 6
Alternate Function Enable Port 7
PEC Channel Link Interrupt Control Register
I2C Data Transmision Interrupt Control Register
ASC Transmit Buffer Interrupt Control Register
External Interrupt Control Register
Port 2 Open Drain Control Register
Port 3 Open Drain Control Register
Port 4 Open Drain Control Register
Port 6 Open Drain Control Register
Port 7 Open Drain Control Register
reserved - do not use
reserved - do not use
reserved - do not use
reserved - do not use
reserved - do not use
Interrupt Sub Node Control Register
CPU Data Page Pointer 0 Register (10 bits)
CPU Data Page Pointer 1 Register (10 bits)
CPU Data Page Pointer 2 Register (10 bits)
CPU Data Page Pointer 3 Register (10 bits)
CPU Code Segment Pointer Register (8 bits)
reserved
CPU Multiply Divide Register - High Word
CPU Multiply Divide Register - Low Word
CPU Context Pointer Register
CPU System Stack Pointer Register
CPU Stack Overflow Pointer Register
625
The Register Set
PSB 21473
2003-03-31
INCA-D
Reset
Value
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
00
00
0000
00
0000
0000
0000
0000
0000
0000
0000
0001
0002
0003
0000
xxxx
0000
0000
FC00
FC00
FA00
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
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H
H
H
H
H
H