MC908AP32CFBE Freescale, MC908AP32CFBE Datasheet - Page 273
MC908AP32CFBE
Manufacturer Part Number
MC908AP32CFBE
Description
Manufacturer
Freescale
Datasheet
1.MC908AP32CFBE.pdf
(324 pages)
Specifications of MC908AP32CFBE
Cpu Family
HC08
Device Core Size
8b
Frequency (max)
8MHz
Interface Type
SCI/SPI
Total Internal Ram Size
2KB
# I/os (max)
32
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PQFP
Program Memory Type
Flash
Program Memory Size
32KB
Lead Free Status / RoHS Status
Compliant
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Chapter 17
External Interrupt (IRQ)
17.1 Introduction
The external interrupt (IRQ) module provides two maskable interrupt inputs: IRQ1 and IRQ2.
17.2 Features
Features of the IRQ module include:
17.3 Functional Description
A logic 0 applied to the external interrupt pin can latch a CPU interrupt request.
Figure 17-3
Interrupt signals on the IRQ pin are latched into the IRQ latch. An interrupt latch remains set until one of
the following actions occurs:
Freescale Semiconductor
$001C
$001E
Addr.
•
•
•
•
•
•
•
•
A dedicated external interrupt pin, IRQ1
An external interrupt pin shared with a port pin, PTC0/IRQ2
Separate IRQ interrupt control bits for IRQ1 and IRQ2
Hysteresis buffers
Programmable edge-only or edge and level interrupt sensitivity
Automatic interrupt acknowledge
Internal pullup resistor, with disable option on IRQ2
Vector fetch — A vector fetch automatically generates an interrupt acknowledge signal that clears
the latch that caused the vector fetch.
IRQ2 Status and Control
IRQ1 Status and Control
Register Name
shows the structure of the IRQ module.
References to either IRQ1 or IRQ2 may be made in the following text by
omitting the IRQ number. For example, IRQF may refer generically to
IRQ1F and IRQ2F, and IMASK may refer to IMASK1 and IMASK2.
(INTSCR2)
(INTSCR1)
Register
Register
Figure 17-1. External Interrupt I/O Register Summary
Reset:
Reset:
Read:
Read:
Write:
Write:
MC68HC908AP Family Data Sheet, Rev. 4
Bit 7
0
0
0
0
PUC0ENB
= Unimplemented
6
0
0
0
NOTE
5
0
0
0
0
4
0
0
0
0
IRQ2F
IRQ1F
3
0
0
ACK2
ACK1
Figure 17-2
2
0
0
0
0
IMASK2
IMASK1
1
0
0
and
MODE2
MODE1
Bit 0
0
0
271
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