MC908AP32CFBE Freescale, MC908AP32CFBE Datasheet - Page 53

• Manufacturer Part Number: MC908AP32CFBE
• Manufacturer: Freescale

Specifications of MC908AP32CFBE

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 2KB
• # I/os (max): 32
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: PQFP
• Program Memory Type: Flash
• Program Memory Size: 32KB
• Lead Free Status / RoHS Status: Compliant

SCIBDSRC — SCI Baud Rate Clock Source
3.5 Mask Option Register (MOR)
The mask option register (MOR) is used for selecting one of the three clock options for the MCU. The
MOR is a byte located in FLASH memory, and is written to by a FLASH programming routine.
OSCSEL1, OSCSEL0 — Oscillator Selection Bits
Bits 5–0 — Should be left as 1’s
Freescale Semiconductor
SCIBDSRC selects the clock source used for the standard SCI module (non-infrared SCI). The setting
of this bit affects the frequency at which the SCI operates.
OSCSEL1 and OSCSEL0 select which oscillator is used for the MCU CGMXCLK clock. The erase
state of these two bits is logic 1. These bits are unaffected by reset. (See
OSCSEL1
1 = Internal data bus clock, f
0 = Oscillator clock, CGMXCLK, is used as clock source for SCI
0
0
1
1
Address:
The internal oscillator is a free running oscillator and is available after each
POR or reset. It is turned-off in stop mode by setting the STOP_ICLKDIS
bit in CONFIG2.
Erased:
Reset:
Read:
Write:
OSCSEL0
OSCSEL1 OSCSEL0
0
1
0
1
$FFCF
Bit 7
R
1
Figure 3-4. Mask Option Register (MOR)
Table 3-1. CGMXCLK Clock Selection
CGMXCLK
6
1
MC68HC908AP Family Data Sheet, Rev. 4
RCCLK
BUS
X-TAL
= Reserved
ICLK
—
, is used as clock source for SCI
R
5
1
output of XTAL
OSC2 pin
Inverting
NOTE
Unaffected by reset
f
f
BUS
BUS
—
R
4
1
R
3
1
Not used
Internal oscillator generates the CGMXCLK.
RC oscillator generates the CGMXCLK.
Internal oscillator is available after each POR
or reset.
X-tal oscillator generates the CGMXCLK.
Internal oscillator is available after each POR
or reset.
R
2
1
Table
Comments
R
1
1
Mask Option Register (MOR)
3-1).
Bit 0
R
1
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