SR2400PP Intel, SR2400PP Datasheet - Page 113

• Manufacturer Part Number: SR2400PP
• Manufacturer: Intel

Specifications of SR2400PP

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Intel® Server Board SE7320VP2
5.2.9.2.3
An assertion of the control panel Reset signal to the mBMC causes the mBMC to start the reset
and reboot process. This is immediate and without the cooperation of any software or operating
system running on the system.
The reset button is a momentary contact button on the control panel. Its signal is routed through
the control panel connector to the mBMC, which monitors and de-bounces it.
If Secure Mode is enabled or if the button is forced protected, the reset button does not reset
the system, but instead a Platform Security Violation Attempt event message is generated.
5.2.9.2.4
As stated in the IPMI 1.5 Specification, a diagnostic interrupt is a non-maskable interrupt or
signal for generating diagnostic traces and ‘core dumps’ from the operating system. The mBMC
generates NMIs and can be used for an OEM-specific diagnostic control panel interface.
The diagnostic interrupt button is connected to the mBMC through the control panel connector.
A diagnostic interrupt button press causes the mBMC to generate a SEL entry that will trigger
an NMI PEF OEM action. The event attributes are: Sensor Type code - 13h (Critical Interrupt)
and Sensor Specific offset - 0h.
5.2.9.2.5
The chassis identify button on the control panel toggles the state of the Chassis ID LED. If the
Chassis ID LED is off, pressing this button causes the LED to blink for 15 seconds. After this
time, the LED will turn off. If the LED is on, a button press or IPMI Chassis Identify command
turns off the LED.
Upon assertion of the chassis identify button, a SEL event is generated by the chassis identity
sensor button. The event attributes are: Sensor Type code - 14h (Button) and Sensor Specific
offset - 1h.
5.2.9.3
The mBMC handles the secure mode feature, which allows the control panel power and reset
buttons to be protected against unauthorized use or access. Secure mode is a signal from the
keyboard controller and is asserted when the keyboard controller is in a locked state. Power
and reset buttons are locked and a security violation event is generated if these buttons are
pressed while secure mode is active.
Secure Mode state is cleared whenever the System is powered down, the Set Chassis
Capabilities command is issued to change the Secure Mode state, or the FP_LOCK signal is
de-asserted.
5.2.10
Fan control is performed by two pulse width modulator (PWM) outputs on the LM93. The 3-pin
CPU fan headers (J5F2, J7F1) are not controlled. These operate at a constant speed. The
mBMC initializes the LM93 to control fan speeds based on temperature.
Revision 2.1
Reset Button
Diagnostic Interrupt Button (Control Panel NMI)
Chassis Identify Button
Secure Mode Operation
Baseboard Fan Control
Intel order number C91056-002
Platform Management
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