SR2400PP Intel, SR2400PP Datasheet - Page 144

no-image

SR2400PP

Manufacturer Part Number
SR2400PP
Description
Manufacturer
Intel
Datasheet

Specifications of SR2400PP

Lead Free Status / Rohs Status
Supplier Unconfirmed
Error Reporting and Handling
Checkpoint
FB
F4
FC
FD
FF
6.5.6
The Device Initialization Manager (DIM) module gets control at various times during BIOS
POST to initialize different Buses. The following table describes the main checkpoints where the
DIM module is accessed:
144
2A
38
Checkpoint
DIM Code Checkpoints
MSB
G=Green, R=Red, A=Amber
Initialize different buses and perform the following functions:
Initialize different buses and perform the following functions:
Diagnostic LED Decoder
R
A
A
A
A
Reset, Detect, and Disable (function 0). Function 0 disables all device nodes, PCI devices,
and PnP ISA cards. It also assigns PCI bus numbers.
Static Device Initialization (function 1). Function 1 initializes all static devices that include
manual configured onboard peripherals, memory and I/O decode windows in PCI-PCI
bridges, and noncompliant PCI devices. Static resources are also reserved.
Boot Output Device Initialization (function 2). Function 2 searches for and initializes any
PnP, PCI, or AGP video devices.
Boot Input Device Initialization (function 3). Function 3 searches for and configures PCI
input devices and detects if system has standard keyboard controller.
IPL Device Initialization (function 4). Function 4 searches for and configures all PnP and
PCI boot devices.
General Device Initialization (function 5). Function 5 configures all onboard peripherals that
are set to an automatic configuration and configures all remaining PnP and PCI devices.
R
A
A
A
A
R
R
R
A
A
Table 78. DIM Code Checkpoints
LSB
Intel order number C91056-002
A
R
R
A
A
Make flash write enabled through chipset and OEM specific method.
Detect proper flash part. Verify that the found flash part size equals
the recovery file size.
The recovery file size does not equal the found flash part size.
Erase the flash part.
Program the flash part.
The flash has been updated successfully. Make flash write disabled.
Disable ATAPI hardware. Restore CPUID value back into register.
Give control to F000 ROM at F000:FFF0h.
Description
Description
Intel® Server Board SE7320VP2
Revision 2.1