SR2400PP Intel, SR2400PP Datasheet - Page 125

• Manufacturer Part Number: SR2400PP
• Manufacturer: Intel

Specifications of SR2400PP

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Intel® Server Board SE7320VP2
6.1.3
The BIOS and firmware provide a feature to guarantee that the system boots, even if one or
more processors fail during POST. The mBMC contains one watchdog timer that can be
configured to reset the system upon time-out. The first timer (FRB3) starts counting down
whenever the system comes out of hard reset. If the BSP successfully resets and begins
executing, the BIOS disables the FRB-3 timer in the mBMC and the system continues executing
POST.
If the timer expires because of the BSP’s failure to fetch or execute BIOS code, the mBMC
resets the system, changes the bootstrap processor, and the tries again to execute the BIOS
code and disable the FRB3 timer. It will continue to cycle until it finds a good processor. The
process of cycling through all the processors is repeated upon system reset or power cycle. Soft
resets do not affect the FRB3 timer. The duration of the FRB3 timer is set by system firmware.
The mBMC generates beep codes on the system speaker if it fails to find a good processor. The
mBMC supports the algorithm described above, but does not disable the processor and the
failure will be logged as an FRB2 failure.
6.1.4
The OS Watchdog Timer feature is designed to allow watchdog timer protection of the operating
system load process. This is done in conjunction with an operating system-present device driver
or application that will disable the watchdog timer once the operating system has successfully
loaded. If the operating system load process fails, the mBMC will reset the system.
The BIOS shall disable the OS Watchdog Timer before handing control to the OS Loader if it is
determined to be booting from removable media or the BIOS cannot determine the media type.
If the BIOS is going to boot to a known hard drive, it will read a user option for the OS Watchdog
Timer for HDD Boots. If this is disabled, the BIOS will ensure the watchdog timer is disabled and
boot. Otherwise the BIOS will read the enabled time value from the option and set the OS
Watchdog timer for that value (5, 10, 15, or 20 minutes) before trying to load the operating
system. If the OS Watchdog Timer is enabled, the timer is repurposed as an OS Watchdog
timer and is referred to by that title as well. WARNING: The BIOS may incorrectly determine that
a removable media is a hard drive if the media emulates a hard drive. In this case, the OS
Watchdog timer will not be automatically disabled.
If the BIOS is going to boot to a known PXE-compliant device, then the BIOS reads a user
option for OS Watchdog Timer for PXE Boots and either disables the timer or enables the timer
with a value read from the option (5, 10, 15, or 20 minutes). If the OS Watchdog Timer is
enabled, the timer is repurposed as an OS Watchdog Timer and is referred to by that title as
well.
If the OS Watchdog Timer is enabled and if a boot password is enabled, the BIOS will disable
the OS Watchdog Timer before prompting the user for a boot password regardless of the OS
Watchdog Timer option setting. Also, if the user has chosen to enter BIOS setup, the timer will
be disabled regardless of option settings. The mBMC retains status bits that can be read by the
BIOS later in the POST for the purpose of logging the appropriate event into the SEL, and
displaying an appropriate error message to the user. As the timer may be repurposed, the BIOS
Revision 2.1
FRB3 – BSP Reset Failures
OS Watchdog Timer - Operating System Load Failures
Intel order number C91056-002
Error Reporting and Handling
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