MT48LC16M16LFFG Micron Technology Inc, MT48LC16M16LFFG Datasheet - Page 11

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MT48LC16M16LFFG

Manufacturer Part Number
MT48LC16M16LFFG
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT48LC16M16LFFG

Lead Free Status / Rohs Status
Not Compliant
EXTENDED MODE REGISTER
beyond those controlled by the Mode Register. These
additional functions are special features of the Mobile
device. They include Temperature Compensated Self
Refresh (TCSR), Partial Array Self Refresh (PASR) and
Driver Strength.
the Mode Register Set command (BA1=1,BA0=0) and
retains the stored information until it is programmed
again or the device loses power.
with M6 through M12 set to “0.” The Extended Mode
Register must be loaded when all banks are idle and no
bursts are in progress, and the controller must wait the
specified time before initiating any subsequent op-
eration. Violating these requirements results in un-
specified operation.
256Mb: x16 Mobile SDRAM
MobileRamY26L_B.p65 – Pub. 04/03
The Extended Mode Register controls the functions
The Extended Mode Register is programmed via
The Extended Mode Register must be programmed
A5
BA1
1
14
A2
0
1
0
0
0
0
1
1
1
1
NOTE: 1. E14 and E13 (BA1 and BA0) must be “1, 0” to select the
0
13
Driver Strength
BA0
Half Strength
Full Strength
12
A12
All have to be set to "0"
A1
0
0
1
1
0
0
1
1
11
A11
EXTENDED MODE REGISTER
Extended Mode Register (vs. the base Mode Register).
10
A10
A0
0
1
0
1
0
1
0
1
9
A9
8
A8
7
A7 A6 A5 A4 A3
A4
1
0
0
1
6
A3
DS
1
0
1
0
Quarter Bank (BA1=BA0=0)
5
11
Self Refresh Coverage
Maximum Case Temp
One Bank (BA1=BA0=0)
Half Bank (BA1=BA0=0)
TCSR
4
Two Banks (BA1=0)
TEMPERATURE COMPENSATED SELF REFRESH
controller to program the Refresh interval during SELF
REFRESH mode, according to the case temperature of
the mobile device. This allows great power savings
during SELF REFRESH during most operating tempera-
ture ranges.
the capacitor losing its charge over time. The refresh
rate is dependent on temperature. At higher tempera-
tures a capacitor loses charge quicker than at lower
temperatures, requiring the cells to be refreshed more
often. Historically, during Self Refresh, the refresh rate
has been set to accommodate the worst case, or highest
temperature range expected.
3
Four Banks
70˚C
85˚C
45˚C
15˚C
Temperature Compensated Self Refresh allows the
Every cell in the DRAM requires refreshing due to
RFU
RFU
A2 A1 A0
2
RFU
PASR
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
0
Address Bus
Extended Mode
Register (Ex)
MOBILE SDRAM
©2003 Micron Technology, Inc. All rights reserved.
256Mb: x16
PRELIMINARY

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