MT48LC16M16LFFG Micron Technology Inc, MT48LC16M16LFFG Datasheet - Page 51

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MT48LC16M16LFFG

Manufacturer Part Number
MT48LC16M16LFFG
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT48LC16M16LFFG

Lead Free Status / Rohs Status
Not Compliant
A0-A9, A11, A12
NOTE: 1. For this example, the CAS latency = 2.
TIMING PARAMETERS
256Mb: x16 Mobile SDRAM
MobileRamY26L_B.p65 – Pub. 04/03
*CAS latency indicated in parentheses.
DQML, DQMH
SYMBOL*
t
t
t
t
t
t
t
t
t
t
AC (3)
AC (2)
AC (1)
AH
AS
CH
CL
CK (3)
CK (2)
CK (1)
COMMAND
BA0, BA1
DQM/
CKE
A10
CLK
2. x16: A9, A11 and A12 = “Don’t Care”
3. Page left open; no
DQ
t CKS
t CMS
t AS
t AS
t AS
ACTIVE
BANK
T0
ROW
ROW
t CKH
t CMH
t AH
t AH
t AH
t RCD
t CL
T1
MIN
NOP
2.5
10
20
1
3
3
8
t CH
t
RP.
-8
MAX
t CMS
19
t CK
COLUMN m 2
7
8
T2
BANK
READ
t CMH
MIN
CAS Latency
2.5
10
12
25
1
3
3
READ – FULL-PAGE BURST
-10
MAX
T3
NOP
22
t LZ
7
8
t AC
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
T4
D
NOP
OUT
t OH
51
m
1,024 (x8) locations within same row
2,048 (x4) locations within same row
t AC
512 (x16) locations within same row
Full-page burst does not self-terminate.
Can use BURST TERMINATE command.
SYMBOL*
t
t
t
t
t
t
t
t
t
t
CKH
CKS
CMH
CMS
HZ (3)
HZ (2)
HZ (1)
LZ
OH
RCD
D
T5
OUT
NOP
t OH
m+1
Full page completed
t AC
Micron Technology, Inc., reserves the right to change products or specifications without notice.
D
T6
OUT
NOP
1
t OH
t AC
m+2
(
(
(
(
(
(
)
(
)
(
)
(
)
(
(
)
)
)
)
)
)
)
(
(
(
(
)
(
)
(
)
(
(
(
(
(
(
)
(
)
(
)
(
)
(
(
)
)
)
)
(
(
(
)
)
)
)
)
)
(
)
(
)
(
)
)
)
)
Tn + 1
D
NOP
OUT
MIN
t OH
m-1
2.5
2.5
2.5
20
1
1
1
MOBILE SDRAM
t AC
-8
©2003 Micron Technology, Inc. All rights reserved.
MAX
BURST TERM
Tn + 2
3
19
7
8
Dout m
256Mb: x16
t OH
PRELIMINARY
t AC
MIN
2.5
2.5
2.5
20
1
1
1
-10
Tn + 3
D
OUT
NOP
MAX
DON’T CARE
UNDEFINED
t OH
22
m+1
t HZ
7
8
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Tn + 4
NOP

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