MT48LC16M16LFFG Micron Technology Inc, MT48LC16M16LFFG Datasheet - Page 46

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MT48LC16M16LFFG

Manufacturer Part Number
MT48LC16M16LFFG
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT48LC16M16LFFG

Lead Free Status / Rohs Status
Not Compliant
TIMING PARAMETERS
256Mb: x16 Mobile SDRAM
MobileRamY26L_B.p65 – Pub. 04/03
A0-A9, A11, A12
*CAS latency indicated in parentheses.
NOTE: 1. For this example, the burst length = 4, the CAS latency = 2, and the READ burst is followed by a “manual”
SYMBOL*
DQML, DQMU
t
t
t
t
t
t
t
t
t
t
t
t
AC (3)
AC (2)
AC (1)
AH
AS
CH
CL
CK (3)
CK (2)
CK (1)
CKH
CKS
COMMAND
BA0, BA1
DQM/
2. x16: A9, A11 and A12 = “Don’t Care”
CKE
A10
CLK
DQ
PRECHARGE.
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
T0
ROW
ROW
BANK
t CKH
t CMH
t AH
t AH
t AH
t RCD
t RAS
t RC
t CK
MIN
2.5
2.5
10
20
1
3
3
8
1
T1
NOP
-8
MAX
19
DISABLE AUTO PRECHARGE
7
8
READ – WITHOUT AUTO PRECHARGE
t CMS
t CL
COLUMN m 2
MIN
T2
2.5
2.5
BANK
READ
10
12
25
1
3
3
1
t CMH
t CH
-10
CAS Latency
MAX
22
7
8
T3
NOP
UNITS
t LZ
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t AC
46
T4
NOP
D
OUT
t OH
SYMBOL*
t AC
m
t
t
t
t
t
t
t
t
t
t
t
CMH
CMS
HZ (3)
HZ (2)
HZ (1)
LZ
OH
RAS
RC
RCD
RP
D
T5
OUT
Micron Technology, Inc., reserves the right to change products or specifications without notice.
NOP
m + 1
t OH
t AC
SINGLE BANK
PRECHARGE
ALL BANKS
D
1
BANK
T6
OUT
t OH
m + 2
t RP
MIN
2.5
2.5
t AC
48
80
20
20
1
1
MOBILE SDRAM
-8
120,000
©2003 Micron Technology, Inc. All rights reserved.
MAX
D
19
T7
7
8
NOP
OUT
256Mb: x16
m + 3
t OH
t HZ
PRELIMINARY
MIN
100
2.5
2.5
50
20
20
1
1
-10
BANK
120,000
T8
ROW
ROW
ACTIVE
MAX
22
7
8
DON’T CARE
UNDEFINED
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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