MT48LC16M16LFFG Micron Technology Inc, MT48LC16M16LFFG Datasheet - Page 50

• Manufacturer Part Number: MT48LC16M16LFFG
• Manufacturer: Micron Technology Inc

Specifications of MT48LC16M16LFFG

• Lead Free Status / Rohs Status: Not Compliant

TIMING PARAMETERS
256Mb: x16 Mobile SDRAM
MobileRamY26L_B.p65 – Pub. 04/03
A0-A9, A11, A12
*CAS latency indicated in parentheses.
NOTE: 1. For this example, the burst length = 4, and the CAS latency = 2.
DQML, DQMU
SYMBOL*
t
t
t
t
t
t
t
t
t
t
t
AC (3)
AC (2)
AC (1)
AH
AS
CH
CL
CK (3)
CK (2)
CK (1)
CKH
COMMAND
BA0, BA1
DQM/
2. x16: A9, A11 and A12 = “Don’t Care”
A10
CLK
CKE
DQ
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
BANK 0
T0
ROW
ROW
t CKH
t CMH
t AH
t AH
t AH
t RCD - BANK 0
t RAS - BANK 0
t
t
RC - BANK 0
RRD
t CK
MIN
2.5
10
20
1
3
3
8
1
T1
NOP
-8
MAX
19
7
8
ALTERNATING BANK READ ACCESSES
ENABLE AUTO PRECHARGE
t CMS
t CL
COLUMN m 2
MIN
BANK 0
2.5
T2
10
12
25
READ
1
3
3
1
t CMH
t CH
-10
CAS Latency - BANK 0
MAX
22
7
8
T3
NOP
UNITS
t LZ
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t AC
50
BANK 3
ACTIVE
T4
ROW
ROW
D
OUT
t OH
t AC
SYMBOL*
t
t
t
t
t
t
t
t
t
t
m
CKS
CMH
CMS
LZ
OH
RAS
RC
RCD
RP
RRD
t RCD - BANK 1
D
T5
OUT
Micron Technology, Inc., reserves the right to change products or specifications without notice.
NOP
m + 1
t OH
t AC
ENABLE AUTO PRECHARGE
COLUMN b 2
BANK 3
D
T6
OUT
READ
1
m + 2
t OH
t AC
MIN
2.5
2.5
2.5
CAS Latency - BANK 1
48
80
20
20
20
1
1
MOBILE SDRAM
-8
120,000
©2003 Micron Technology, Inc. All rights reserved.
MAX
t RP - BANK 0
D
T7
OUT
NOP
256Mb: x16
m + 3
t OH
t AC
PRELIMINARY
MIN
100
2.5
2.5
2.5
50
20
20
20
1
1
-10
BANK 0
120,000
T8
ACTIVE
ROW
ROW
MAX
DON’T CARE
UNDEFINED
D
OUT
t RCD - BANK 0
t OH
t AC
b
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns