MT48LC16M16LFFG Micron Technology Inc, MT48LC16M16LFFG Datasheet - Page 56

• Manufacturer Part Number: MT48LC16M16LFFG
• Manufacturer: Micron Technology Inc

Specifications of MT48LC16M16LFFG

• Lead Free Status / Rohs Status: Not Compliant

A0-A9, A11, A12
TIMING PARAMETERS
*CAS latency indicated in parentheses.
256Mb: x16 Mobile SDRAM
MobileRamY26L_B.p65 – Pub. 04/03
NOTE: 1. For this example, the burst length = 1.
SYMBOL*
DQML, DQMU
t
t
t
t
t
t
t
t
t
t
AH
AS
CH
CL
CK (3)
CK (2)
CK (1)
CKH
CKS
CMH
COMMAND
BA0, BA1
DQM/
CKE
A10
2. WRITE command not allowed else
3. x16: A9, A11 and A12 = “Don’t Care”
4. Requires one clock plus time (5ns to 7ns) with auto precharge or 14ns to 15ns with PRECHARGE.
DQ
CK
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
T0
ROW
ROW
BANK
t CMH
t CKH
t AH
t AH
t AH
t RCD
t RAS
t RC
t CK
MIN
T1
NOP 2
2.5
2.5
10
20
1
3
3
8
1
1
-8
SINGLE WRITE – WITH AUTO PRECHARGE
MAX
t CL
NOP 2
T2
t CH
MIN
2.5
2.5
10
12
25
1
3
3
1
1
t
RAS would be violated.
-10
MAX
NOP 2
T3
UNITS
ENABLE AUTO PRECHARGE
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t CMS
t DS
COLUMN m 3
BANK
WRITE
T4
D
IN
t CMH
56
t DH
m
t WR
4
SYMBOL*
t
t
t
t
t
t
t
t
CMS
DH
DS
RAS
RC
RCD
RP
WR
T5
NOP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T6
NOP
t RP
1 CLK +
1
T7
NOP
MIN
7ns
2.5
2.5
48
80
20
20
1
MOBILE SDRAM
-8
120,000
©2003 Micron Technology, Inc. All rights reserved.
MAX
256Mb: x16
ACTIVE
ROW
BANK
ROW
T8
1 CLK +
PRELIMINARY
MIN
100
5ns
2.5
2.5
50
20
20
1
-10
DON’T CARE
120,000
MAX
T9
NOP
UNITS
ns
ns
ns
ns
ns
ns
ns
–