LFXP10C-3F388I Lattice, LFXP10C-3F388I Datasheet - Page 160

• Manufacturer Part Number: LFXP10C-3F388I
• Description: FPGA LatticeXP Family 10000 Cells 320MHz 130nm (CMOS) Technology 1.8V/2.5V/3.3V 388-Pin FBGA Tray
• Manufacturer: Lattice

Specifications of LFXP10C-3F388I

• Package: 388FBGA
• Family Name: LatticeXP
• Device Logic Units: 10000
• Maximum Internal Frequency: 320 MHz
• Typical Operating Supply Voltage: 1.8|2.5|3.3 V
• Maximum Number Of User I/os: 244
• Ram Bits: 221184
• Re-programmability Support: Yes
• Lead Free Status / Rohs Status: Contains lead / RoHS non-compliant

Lattice Semiconductor
Verilog for Precision RTL Synthesis
This section lists syntax and examples for all the sysIO Attributes in Verilog using the Precision RTL Synthesis syn-
thesis tool.
Syntax
Table 8-10. Verilog Precision RTL Synthesis Attribute Syntax
Example
//****IO_TYPE ***
//pragma attribute portA IO_TYPE PCI33
//pragma attribute portB IO_TYPE LVCMOS33
//pragma attribute portC IO_TYPE SSTL25_II
//*** Opendrain ***
//pragma attribute portB OPENDRAIN ON
//pragma attribute portD OPENDRAIN OFF
//*** Drive ***
//pragma attribute portB DRIVE 20
//pragma attribute portD DRIVE 8
//*** Pullmode***
//pragma attribute portB PULLMODE UP
//*** PCIClamp***
//pragma attribute portB PCICLAMP ON
//*** Slewrate ***
//pragma attribute portB SLEWRATE FAST
//pragma attribute portD SLEWRATE SLOW
IO_TYPE
OPENDRAIN
DRIVE
PULLMODE
PCICLAMP
SLEWRATE
FIXEDDELAY
LOC
ATTRIBUTE
//pragma attribute PinName IO_TYPE IO_TYPE Value
//pragma attribute PinName OPENDRAIN OpenDrain Value
//pragma attribute PinName DRIVE Drive Value
//pragma attribute PinName IO_TYPE Pullmode Value
//pragma attribute PinName PCICLAMP PCIClamp Value
//pragma attribute PinName IO_TYPE Slewrate Value
//pragma attribute PinName IO_TYPE Fixeddelay Value
//pragma attribute PinName LOC pin_location
8-20
SYNTAX
LatticeECP/EC and LatticeXP
sysIO Usage Guide