DSPB56366AG120 Freescale Semiconductor, DSPB56366AG120 Datasheet - Page 15

IC DSP 24BIT AUD 120MHZ 144-LQFP

DSPB56366AG120

Manufacturer Part Number
DSPB56366AG120
Description
IC DSP 24BIT AUD 120MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
Symphony™r
Type
Audio Processorr
Datasheet

Specifications of DSPB56366AG120

Interface
Host Interface, I²C, SAI, SPI
Clock Rate
120MHz
Non-volatile Memory
ROM (240 kB)
On-chip Ram
69kB
Voltage - I/o
3.30V
Voltage - Core
3.30V
Operating Temperature
-40°C ~ 110°C
Mounting Type
Surface Mount
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Freescale Semiconductor
Signal Name
HOREQ/
HOREQ
HRRQ/
HTRQ/
HACK/
HRRQ
HTRQ
HACK
HA10
PB13
PB14
PB15
Input, output, or
Input, output, or
Input, output, or
disconnected
disconnected
disconnected
Output
Output
Output
Type
Input
Input
disconnected
disconnected
disconnected
disconnected
disconnected
disconnected
disconnected
disconnected
State during
Reset
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
Table 2-9 Host Interface (continued)
DSP56366 Technical Data, Rev. 3.1
Host Address 10—When HDI08 is programmed to interface a multiplexed
host bus and the HI function is selected, this signal is line 10 of the host
address (HA10) input bus.
Port B 13—When the HDI08 is configured as GPIO, this signal is
individually programmed as input, output, or internally disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 5 V tolerant.
Host Request—When HDI08 is programmed to interface a single host
request host bus and the HI function is selected, this signal is the host
request (HOREQ) output. The polarity of the host request is programmable,
but is configured as active-low (HOREQ) following reset. The host request
may be programmed as a driven or open-drain output.
Transmit Host Request—When HDI08 is programmed to interface a
double host request host bus and the HI function is selected, this signal is
the transmit host request (HTRQ) output. The polarity of the host request is
programmable, but is configured as active-low (HTRQ) following reset. The
host request may be programmed as a driven or open-drain output.
Port B 14—When the HDI08 is configured as GPIO, this signal is
individually programmed as input, output, or internally disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 5 V tolerant.
Host Acknowledge—When HDI08 is programmed to interface a single
host request host bus and the HI function is selected, this signal is the host
acknowledge (HACK) Schmitt-trigger input. The polarity of the host
acknowledge is programmable, but is configured as active-low (HACK) after
reset.
Receive Host Request—When HDI08 is programmed to interface a double
host request host bus and the HI function is selected, this signal is the
receive host request (HRRQ) output. The polarity of the host request is
programmable, but is configured as active-low (HRRQ) after reset. The host
request may be programmed as a driven or open-drain output.
Port B 15—When the HDI08 is configured as GPIO, this signal is
individually programmed as input, output, or internally disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 5 V tolerant.
Signal Description
2-11

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