DSPB56366AG120 Freescale Semiconductor, DSPB56366AG120 Datasheet - Page 63

• Manufacturer Part Number: DSPB56366AG120
• Description: IC DSP 24BIT AUD 120MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: Symphony™r
• Type: Audio Processorr

Specifications of DSPB56366AG120

• Interface: Host Interface, I²C, SAI, SPI
• Clock Rate: 120MHz
• Non-volatile Memory: ROM (240 kB)
• On-chip Ram: 69kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 110°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.11
Freescale Semiconductor
No.
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
Read data strobe assertion width
HACK read assertion width
Read data strobe deassertion width
HACK read deassertion width
Read data strobe deassertion width
between two consecutive CVR, ICR, or ISR reads
HACK deassertion width after “Last Data Register” reads
Write data strobe assertion width
HACK write assertion width
Write data strobe deassertion width
HACK write deassertion width
HAS assertion width
HAS deassertion to data strobe assertion
Host data input setup time before write data strobe deassertion
Host data input setup time before HACK write deassertion
Host data input hold time after write data strobe deassertion
Host data input hold time after HACK write deassertion
Read data strobe assertion to output data active from high impedance
HACK read assertion to output data active from high impedance
Read data strobe assertion to output data valid
HACK read assertion to output data valid
Read data strobe deassertion to output data high impedance
HACK read deassertion to output data high impedance
Output data hold time after read data strobe deassertion
Output data hold time after HACK read deassertion
HCS assertion to read data strobe deassertion
HCS assertion to write data strobe deassertion
HCS assertion to output data valid
• after ICR, CVR and “Last Data Register” writes
• after IVR writes, or
• after TXH:TXM writes (with HBE=0), or
• after TXL:TXM writes (with HBE=1)
Parallel Host Interface (HDI08) Timing
Table 3-18 Host Interface (HDI08) Timing
Characteristics
4
8
4
DSP56366 Technical Data, Rev. 3.1
4
8
after “Last Data Register” reads
9
3
4
4
8
7
5
4
5
,
6
8
4
8
5,6
4
, or
1, 2
2.5 × T
2.5 × T
Expression
T
T
C
C
—
—
—
—
—
—
—
—
—
—
—
—
+ 9.9
+9.9
C
C
+ 6.6
+ 6.6
18.3
27.4
13.2
27.4
16.5
18.2
Min
9.9
9.9
0.0
9.9
3.3
3.3
3.3
9.9
—
—
—
120 MHz
19.1
Max
24.2
9.9
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
3-37