EP3C55F484I7 Altera, EP3C55F484I7 Datasheet - Page 21

• Manufacturer Part Number: EP3C55F484I7
• Description: IC CYCLONE III FPGA 55K 484 FBGA
• Manufacturer: Altera
• Series: Cyclone® IIIr

Specifications of EP3C55F484I7

• Number Of Logic Elements/cells: 55856
• Number Of Labs/clbs: 3491
• Total Ram Bits: 2396160
• Number Of I /o: 327
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 484-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

Board Design Considerations
Device Power-up
© November 2008 Altera Corporation
f
In many applications, knowing the power-up behavior of your device is critical,
especially when you are inserting or removing the board in a system during system
operation. Considerations include I/O behaviors and the conditions of supplies and
timing. Review the conditions and considerations discussed in this section before you
begin with board design and configuration setup to ensure a successful
implementation of Cyclone III devices in your design.
Technology
Cyclone III devices are designed with hot-socketing and power-on reset (POR)
circuitry that regulates the power-up sequencing of the device prior to configuration.
These circuitries ensure that Cyclone III devices are ready for configuration while
taking care of uncertainties on device interfaces during these stages. These also enable
the Cyclone III device to be hot-swapped without the use of any external devices.
Figure 1
For more details about hot socketing and power-on reset circuit operation, refer to the
Hot Socketing and Power-On Reset in Cyclone III Devices
Cyclone III Device Handbook.
Figure 1. Cyclone III Power-Up Stages
Note to
(1) V
Requirements and Behavior
The requirement and behavior of a Cyclone III device are detailed in
stage prior to configuration.
CC
V
Figure
ramp must be monotonic.
CC
Minimum
illustrates the power-up stages of a Cyclone III device.
1:
V
Voltage
CC
Time
Ramp
POR Time
Configuration Time
chapter in volume 1 of the
Initialization
Time
Table 8
Mode
User
Time
for each
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