EP3C55F484I7 Altera, EP3C55F484I7 Datasheet - Page 54

• Manufacturer Part Number: EP3C55F484I7
• Description: IC CYCLONE III FPGA 55K 484 FBGA
• Manufacturer: Altera
• Series: Cyclone® IIIr

Specifications of EP3C55F484I7

• Number Of Logic Elements/cells: 55856
• Number Of Labs/clbs: 3491
• Total Ram Bits: 2396160
• Number Of I /o: 327
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 484-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

Page 54
Power Analysis
Simulation
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The Compilation Time Advisor provides guidance in making settings that reduce
your design compilation time. On the Tools menu, point to Advisors, and click
Compilation Time Advisor. Using some of these techniques to reduce compilation
time can reduce the overall quality of results (QoR).
For more suggestions, refer to the
the Quartus II Handbook.
When your design is completed, use Quartus II PowerPlay Power Analyzer to
calculate the power consumption of your design to ensure that the thermal and power
supply budgets are not violated. You must successfully compile your design to use
the PowerPlay Power Analyzer. Information about the design resources, placement
and routing and I/O standard assigned to each I/O pin allow PowerPlay Power
Analyzer to provide accurate power estimation.
To run power analysis, from the Processing menu, click PowerPlay Power Analyzer
Tool. You must specify the source of input data and operating conditions.
The input data can derive from either signal activity data from simulation results or a
user-defined default toggle rate and vectorless estimation. The signal activities used
for the analysis must be representative of the actual operating behavior over realistic
time period. For the most accurate power estimation, use gate-level simulation results
with a Value Change Dump (.vcd) output file from the Quartus II Simulator or a
third-party simulation tool. Use the recommended simulator settings (such as glitch
filtering) to ensure good results.
The operating conditions, including core voltage, device power characteristic,
ambient and junction temperature, cooling solution and board thermal model can be
set in the Operating Settings and Conditions page in the Settings dialog box.
The PowerPlay Power Analyzer tool calculates the core and I/O dynamic power,
static power and current consumed from the power supplies. The tool also provides a
summary of the signal activities used for analysis and a confidence metric of the data
sources for the signal activities.
For more information about Signal Activity files (SAFs) and how to create them, refer
to the
For more information about the PowerPlay Power Analyzer tool, refer to the
PowerPlay Power Analysis
Perform simulation to verify your design works correctly. For designs that consist of
multiple modules, simulation ensures that each module is functionally working
before being combined together. Debugging your design at lower level saves you
debugging time. You can monitor pins or registered signals through simulation.
1
Quartus II Simulator
Note that the report is a power estimate based on the data provided, and is
not a power specification. Always refer to the data sheet for your device.
chapter in volume 3 of the Quartus II Handbook.
chapter in volume 3 of the Quartus II Handbook.
Area and Timing Optimization
© November 2008 Altera Corporation
chapter in volume 2 of
Verification