EP2SGX30CF780C5N Altera, EP2SGX30CF780C5N Datasheet - Page 207
![IC STRATIX II GX 30K 780-FBGA](/photos/6/72/67270/544-780-fbga_sml.jpg)
EP2SGX30CF780C5N
Manufacturer Part Number
EP2SGX30CF780C5N
Description
IC STRATIX II GX 30K 780-FBGA
Manufacturer
Altera
Series
Stratix® II GXr
Datasheet
1.EP2SGX30DF780C5.pdf
(316 pages)
Specifications of EP2SGX30CF780C5N
Number Of Logic Elements/cells
33880
Number Of Labs/clbs
1694
Total Ram Bits
1369728
Number Of I /o
361
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
780-FBGA
Family Name
Stratix II GX
Number Of Logic Blocks/elements
33880
# I/os (max)
361
Frequency (max)
609.76MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.2V
Logic Cells
33880
Ram Bits
1369728
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-1750
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP2SGX30CF780C5N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
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Altera Corporation
June 2009
SONET/SDH
OC-48
SONET/SDH
OC-12
XAUI
PIPE
GIGE
SONET/SDH
(OIF) CEI PHY
CPRI
Table 4–20. Recommended Input Clock Jitter (Part 2 of 2)
Table 4–21. PCS Latency (Part 1 of 2)
Functional Mode
Mode
(3)
Clock (MHz)
Reference
155.52
311.04
622.08
155.52
622.08
77.76
77.76
62.2
16-bit channel
311
Configuration
8-bit channel
1.228 Gbps
2.456 Gbps
614 Mbps,
×1, ×4, ×8
×1, ×4, ×8
OC-12
OC-48
OC-96
width
width
Tables 4–21
each mode, respectively.
Type/Model
LVPECL XO
VCC6-Q/R
VCC6-Q/R
VCC6-Q/R
VCC6-Q/R
VCC6-Q/R
VCC6-Q
VCC6-Q
VCC6-Q
VCC6-Q
Vectron
TX PIPE
Note (1)
1
1
-
-
-
-
-
-
-
-
and
4–22
Range (MHz)
Phase
Comp
FIFO
Frequency
270 to 800
270 to 800
270 to 800
270 to 800
2-3
10 to 270
10 to 270
10 to 270
10 to 270
10 to 270
2-3
3-4
3-4
2-3
2-3
2-3
2-3
2-3
TX
2
show the transmitter and receiver PCS latency for
Transmitter PCS Latency
Serializer
Byte
1
1
1
1
1
1
1
1
1
1
(12 kHz to 20
RMS Jitter
MHz) (ps)
Stratix II GX Device Handbook, Volume 1
0.3
0.3
0.3
0.3
0.3
2
2
2
2
TX State
Machine
0.5
-
-
-
-
-
-
-
-
-
DC and Switching Characteristics
Period Jitter
Peak) (ps)
Encoder
(Peak to
8B/10B
0.5
0.5
0.5
0.5
0.5
23
23
30
30
23
30
23
23
30
1
1
1
1
1
Sum
Phase Noise
Not available
Not available
Not available
Not available
4-5
6-7
6-7
4-5
4-5
4-5
4-5
4-5
4-5
4
-149.5476
-149.1903
-149.6289
-149.5476
-149.1903
(dB c/Hz)
at 1 MHz
(2)
4–37
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