EP2SGX30CF780C5N Altera, EP2SGX30CF780C5N Datasheet - Page 291
EP2SGX30CF780C5N
Manufacturer Part Number
EP2SGX30CF780C5N
Description
IC STRATIX II GX 30K 780-FBGA
Manufacturer
Altera
Series
Stratix® II GXr
Datasheet
1.EP2SGX30DF780C5.pdf
(316 pages)
Specifications of EP2SGX30CF780C5N
Number Of Logic Elements/cells
33880
Number Of Labs/clbs
1694
Total Ram Bits
1369728
Number Of I /o
361
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
780-FBGA
Family Name
Stratix II GX
Number Of Logic Blocks/elements
33880
# I/os (max)
361
Frequency (max)
609.76MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.2V
Logic Cells
33880
Ram Bits
1369728
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-1750
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP2SGX30CF780C5N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
- Current page: 291 of 316
- Download datasheet (2Mb)
Therefore, the DCD percentage for the output clock at 267 MHz is from
47.5% to 52.5%.
Column I/O Output
3.3-V LVTTL
3.3-V LVCMOS
2.5 V
1.8 V
1.5-V LVCMOS
SSTL-2 Class I
SSTL-2 Class II
SSTL-18 Class I
SSTL-18 Class II
1.8-V HSTL
Class I
1.8-V HSTL
Class II
1.5-V HSTL
Class I
1.5-V HSTL
Class II
1.2-V HSTL-12
LVPECL
Table 4–99. Maximum DCD for Non-DDIO Output on Column I/O Pins
Standard I/O
Standard
Maximum DCD (ps) for Non-DDIO
-3 Devices
190
140
125
185
105
100
170
80
90
70
80
80
85
50
55
Output
-4 and -5 Devices
220
175
155
110
215
135
130
115
100
110
110
115
200
80
80
Unit
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
Related parts for EP2SGX30CF780C5N
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
Stratix Ii Gx Device Data Sheet
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CYCLONE II STARTER KIT EP2C20N
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 30 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 7ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Classic EPLD
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet: