CY8CTMG201-48LTXI Cypress Semiconductor Corp, CY8CTMG201-48LTXI Datasheet - Page 267

• Manufacturer Part Number: CY8CTMG201-48LTXI
• Description: IC MCU 16K FLASH PSOC 48-QFN
• Manufacturer: Cypress Semiconductor Corp
• Series: TrueTouch™r

Specifications of CY8CTMG201-48LTXI

• Applications: Touchscreen Controller
• Core Processor: M8C
• Program Memory Type: FLASH (16 kB)
• Controller Series: CY8CT
• Ram Size: 2K x 8
• Interface: I²C, SPI, UART/USART, USB
• Number Of I /o: 38
• Voltage - Supply: 1.8 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-QFN
• Processor Series: CY8CTxx2xx
• Core: M8C
• For Use With: 770-1000 - ISP 4PORT FOR CYPRESS PSOC MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 428-2972

21.4.9
The USB Miscellaneous Control Register controls the clocks to the USB block to make IMO work with better accuracy for the
USB part and to disable the single ended input of USBIO in the case of a non-USB part.
In the table above, note that reserved bits are grayed table cells and are not described in the bit description section below.
Reserved bits must always be written with a value of ‘0’. For additional information, refer to the
page 112
Bit
2
1
0
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
Individual Register Names and Addresses:
USB_MISC_CR: 1,BDh
Access : POR
Bit Name
USE_SE_EN
USB_ON
USB_CLK_ON
Name
in the Digital Clocks chapter.
USB Miscellaneous Control Register
USB_MISC_CR
7
6
Description
The single ended outputs of USBIO is enabled or disabled based upon this bit setting. Set this bit to
'1' when using this part as a USB part.
0
1
Note Bit [1:0] of the USBIO_CR1 register is also affected by this register setting. When this bit is '0'
(default) regardless of the DP and DM state, the DPO and DMO bits of USBIO_CR1 are '11b'.
This bit is used by the IMO DAC block to either work with better DNL consuming higher power, or with
sacrificed DNL consuming lower power. Set this bit to '1' when the part is used as a USB part.
0
1
This bit either enables or disables the clocks to the USB block. It is used to save power in cases when
the device need not respond to USB traffic. Set this bit to '1' when the device is used as a USB part.
0
1
The single ended ouputs of USBIO are disabled. The DPO, DMO is held at logic high state
and RSEO is held at a low state.
The single ended output of USBIO is enabled and USB transactions can occur.
The IMO runs with sacrificed DNL by consuming less power.
The IMO runs with better DNL by consuming more power.
All clocks to the USB block are driven as '0'. The device does not respond to USB traffic and
none of the USB registers, except IMO_TR, IMO_TR1 and USBIO_CR1, listed in the
ter Definitions on page 171
Clocks are not blocked to the USB block. The device responds to USB traffic depending
upon the other register settings mentioned in
Speed USB chapter.
5
4
are writable.
3
USB_SE_EN
Register Definitions on page 171
RW : 0
2
1,BDh
USB_ON
RW : 0
Register Definitions on
1
USB_MISC_CR
USB_CLK_ON
1,BDh
RW : 0
in the Full-
0
Regis-
267
[+] Feedback