LAN9211-ABZJ SMSC, LAN9211-ABZJ Datasheet - Page 123

IC ETHERNET CTLR SGL CHIP 56-QFN

LAN9211-ABZJ

Manufacturer Part Number
LAN9211-ABZJ
Description
IC ETHERNET CTLR SGL CHIP 56-QFN
Manufacturer
SMSC
Type
Single Chip MAC and PHY Controllerr
Datasheet

Specifications of LAN9211-ABZJ

Controller Type
Ethernet Controller
Interface
Serial EEPROM
Voltage - Supply
3.3V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-QFN
Product
Ethernet Controllers
Number Of Transceivers
1
Standard Supported
IEEE 802.3 or IEEE 802.3u
Data Rate
10 Mbps or 100 Mbps
Supply Voltage (max)
5 V
Supply Voltage (min)
3.3 V
Supply Current (max)
86 mA
Maximum Operating Temperature
+ 70 C
Ethernet Connection Type
100BASE-TX or 10BASE-T
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
No. Of Ports
2
Ethernet Type
IEEE 802.3 / 802.3u
Interface Type
HBI
Supply Current
86mA
Supply Voltage Range
2.97V To 3.63V
Operating Temperature Range
0°C To +70°C
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
638-1049-6

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LAN9211-ABZJ
Manufacturer:
Standard
Quantity:
3
Part Number:
LAN9211-ABZJ
Manufacturer:
SMSC
Quantity:
1 154
Part Number:
LAN9211-ABZJ
Manufacturer:
SMSC
Quantity:
20 000
High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support
Datasheet
SMSC LAN9211
5.5.10
ADDRESS
12:11
9-5
3:0
15
14
13
10
4
Special Control/Status Indications
Override AMDIX Strap
0 - AMDIX_EN (pin 52) enables or disables HP Auto MDIX
1 - Override pin 52. PHY Register 27.14 and 27.13 determine MDIX
function
Auto-MDIX Enable: Only effective when 27.15=1, otherwise ignored.
0 = Disable Auto-MDIX. 27.13 determines normal or reversed connection.
1 = Enable Auto-MDIX. 27.13 must be set to 0.
Auto-MDIX State. Only effective when 27.15=1, otherwise ignored.
When 27.14 = 0 (manually set MDIX state):
When 27.14 = 1 (automatic MDIX) this bit must be set to 0.
Do not use the combination 27.15=1, 27.14=1, 27.13=1.
Reserved: Write as 0. Ignore on read.
VCOOFF_LP: Forces the Receive PLL 10M to lock on the reference clock
at all times:
0 - Receive PLL 10M can lock on reference or line as needed (normal
1 - Receive PLL 10M is locked on the reference clock.
In this mode 10M data packets cannot be received.
Reserved: Write as 0. Ignore on read.
XPOL: Polarity state of the 10Base-T:
0 - Normal polarity
1 - Reversed polarity
Reserved: Read only - Writing to these bits have no effect.
Index (In Decimal):
operation)
0 = no crossover (TPO = output, TPI = input)
1 = crossover (TPO = input, TPI = output)
DESCRIPTION
27
DATASHEET
123
Size:
16-bits
MODE
NASR
RW,
RW
RW
RW
RW
RW
RO
RO
Revision 2.7 (03-15-10)
DEFAULT
XXXXb
0
0
0
0
0
0
0

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