LAN9211-ABZJ SMSC, LAN9211-ABZJ Datasheet - Page 15

• Manufacturer Part Number: LAN9211-ABZJ
• Description: IC ETHERNET CTLR SGL CHIP 56-QFN
• Manufacturer: SMSC
• Type: Single Chip MAC and PHY Controllerr

Specifications of LAN9211-ABZJ

• Controller Type: Ethernet Controller
• Interface: Serial EEPROM
• Voltage - Supply: 3.3V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-QFN
• Product: Ethernet Controllers
• Number Of Transceivers: 1
• Standard Supported: IEEE 802.3 or IEEE 802.3u
• Data Rate: 10 Mbps or 100 Mbps
• Supply Voltage (max): 5 V
• Supply Voltage (min): 3.3 V
• Supply Current (max): 86 mA
• Maximum Operating Temperature: + 70 C
• Ethernet Connection Type: 100BASE-TX or 10BASE-T
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• No. Of Ports: 2
• Ethernet Type: IEEE 802.3 / 802.3u
• Interface Type: HBI
• Supply Current: 86mA
• Supply Voltage Range: 2.97V To 3.63V
• Operating Temperature Range: 0°C To +70°C
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 638-1049-6

High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support
Datasheet
SMSC LAN9211
2.1
Host Address
PHY External Bias
Read Strobe
Write Strobe
FIFO Select
Chip Select
Host Data
Interrupt
Request
NAME
Resistor
NAME
TPO+
TPO-
TPI+
TPI-
Note: The pin names for the twisted pair pins shown above apply to a normal connection. If HP Auto-
Pin List
MDIX is enabled and a reverse connection is detected, or a reverse connection is manually
selected, the input pins become outputs, and vice-versa, as indicated in the descriptions.
FIFO_SEL
SYMBOL
D[15:0]
A[7:1]
nWR
nRD
nCS
IRQ
SYMBOL
EXRES1
TPO+
TPO-
TPI+
TPI-
BUFFER
O8/OD8
Table 2.1 Host Bus Interface Signals
TYPE
I/O8
Table 2.2 LAN Interface Signals
IS
IS
IS
IS
IS
BUFFER
TYPE
AO
AO
AI
AI
AI
DATASHEET
PINS
16
#
7
1
1
1
1
1
PINS
NUM
15
1
1
1
1
1
Bi-directional data port.
7-bit Address Port. Used to select Internal CSR’s and
TX and RX FIFOs.
Active low strobe to indicate a read cycle.
Active low strobe to indicate a write cycle. This signal,
qualified with nCS, is also used to wakeup the
LAN9211 when it is in a reduced power state.
Active low signal used to qualify read and write
operations. This signal qualified with nWR is also used
to wakeup the LAN9211 when it is in a reduced power
state.
Programmable Interrupt request. Programmable
polarity, source and buffer types.
When driven high all accesses to the LAN9211 are to
the RX or TX Data FIFOs. In this mode, the A[7:3]
upper address inputs are ignored.
Transmit Positive Output (normal)
Receive Positive Input (reversed)
Transmit Negative Output (normal)
Receive Negative Input (reversed)
Receive Positive Input (normal)
Transmit Positive Input (reversed)
Receive Negative Input (normal)
Transmit Negative Output (reversed)
Must be connected to ground through a 12.4K
ohm 1% resistor.
DESCRIPTION
DESCRIPTION
Revision 2.7 (03-15-10)