LAN9211-ABZJ SMSC, LAN9211-ABZJ Datasheet - Page 46

• Manufacturer Part Number: LAN9211-ABZJ
• Description: IC ETHERNET CTLR SGL CHIP 56-QFN
• Manufacturer: SMSC
• Type: Single Chip MAC and PHY Controllerr

Specifications of LAN9211-ABZJ

• Controller Type: Ethernet Controller
• Interface: Serial EEPROM
• Voltage - Supply: 3.3V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-QFN
• Product: Ethernet Controllers
• Number Of Transceivers: 1
• Standard Supported: IEEE 802.3 or IEEE 802.3u
• Data Rate: 10 Mbps or 100 Mbps
• Supply Voltage (max): 5 V
• Supply Voltage (min): 3.3 V
• Supply Current (max): 86 mA
• Maximum Operating Temperature: + 70 C
• Ethernet Connection Type: 100BASE-TX or 10BASE-T
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• No. Of Ports: 2
• Ethernet Type: IEEE 802.3 / 802.3u
• Interface Type: HBI
• Supply Current: 86mA
• Supply Voltage Range: 2.97V To 3.63V
• Operating Temperature Range: 0°C To +70°C
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 638-1049-6

Revision 2.7 (03-15-10)
3.10.3.2
3.11
PHY REG 0.15
SOURCE
RESET
PHY_RST
nRESET
SRST
Energy Detect Power-Down
This power-down mode is activated by setting the Phy register bit 17.13 to 1. Please refer to
5.5.8, "Mode Control/Status," on page 121
no energy is present on the line, the PHY is powered down, with the exception of the management
interface, the SQUELCH circuit and the ENERGYON logic. The ENERGYON logic is used to detect
the presence of valid energy from 100Base-TX, 10Base-T, or Auto-negotiation signals
In this mode, when the ENERGYON signal is low, the PHY is powered-down, and nothing is
transmitted. When energy is received - link pulses or packets - the ENERGYON signal goes high, and
the PHY powers-up. It automatically resets itself into the state it had prior to power-down, and asserts
the INT7.1 bit of the register defined in
ENERGYON interrupt is enabled, this event will cause an interrupt to the host. The first and possibly
the second packet to activate ENERGYON may be lost. When 17.13 is low, energy detect power-down
is disabled.
The LAN9211 has four reset sources:
Table 3.11
Note: For proper operation, the LAN9211 must be reset on power-up via the hardware reset input
Note 3.17 After any PHY reset, the application must wait until the “Link Status” bit in the PHY’s “Basic
Note 3.18 After a power-up, nRESET or SRST, the LAN9211 will automatically check for the
Note 3.19 HBI - “Host Bus Interface”, NASR - Not affected by software reset.
Detailed Reset Description
Hardware Reset Input Pin (nRESET)
Soft Reset (SRST)
PHY Soft Reset via PMT_CTRL bit 10 (PHY_RST)
PHY Soft Reset via PHY Basic Control Register (PHY REG 0.15)
PLL
(nRESET) or soft reset (SRST). To accomplish this, nRESET should be asserted for the
minimum period of 30ms at power-up. Alternatively, a soft reset may be performed following
power-up by setting the SRST bit of the HW_CFG register once the READY bit in the
PMT_CTRL register has been set. Refer to
and
X
shows the effect of the various reset sources on the LAN9211's circuitry.
Status Register” (PHY Reg. 1.2) is set before attempting to transmit or receive data.
presence of an external EEPROM. After any of these resets the application must verify
that the EPC Busy Bit (E2P_CMD, bit 31) is cleared before attempting to access the
EEPROM, or change the function of the GPO/GPIO signals, or before modifying the
ADDRH or ADDRL registers in the MAC.
Section 3.11.3, "Soft Reset (SRST)"
Note
HBI
3.19
X
X
Table 3.11 Reset Sources and Affected Circuitry
REGISTERS
Note 3.19
NASR
X
DATASHEET
High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support
MIL
X
X
Section 5.5.11, "Interrupt Source Flag," on page
for additional information on this register. In this mode when
46
MAC
for additional information.
X
X
Section 3.11.1, "Hardware Reset Input (nRESET)"
Note 3.17
PHY
X
X
X
EEPROM MAC
Note 3.18
RELOAD
ADDR.
X
X
LATCHED
SMSC LAN9211
CONFIG.
STRAPS
124. If the
Datasheet
X
Section