LAN9211-ABZJ SMSC, LAN9211-ABZJ Datasheet - Page 143

• Manufacturer Part Number: LAN9211-ABZJ
• Description: IC ETHERNET CTLR SGL CHIP 56-QFN
• Manufacturer: SMSC
• Type: Single Chip MAC and PHY Controllerr

Specifications of LAN9211-ABZJ

• Controller Type: Ethernet Controller
• Interface: Serial EEPROM
• Voltage - Supply: 3.3V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-QFN
• Product: Ethernet Controllers
• Number Of Transceivers: 1
• Standard Supported: IEEE 802.3 or IEEE 802.3u
• Data Rate: 10 Mbps or 100 Mbps
• Supply Voltage (max): 5 V
• Supply Voltage (min): 3.3 V
• Supply Current (max): 86 mA
• Maximum Operating Temperature: + 70 C
• Ethernet Connection Type: 100BASE-TX or 10BASE-T
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• No. Of Ports: 2
• Ethernet Type: IEEE 802.3 / 802.3u
• Interface Type: HBI
• Supply Current: 86mA
• Supply Voltage Range: 2.97V To 3.63V
• Operating Temperature Range: 0°C To +70°C
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 638-1049-6

High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support
Datasheet
SMSC LAN9211
7.7
Crystal Cut
Crystal Oscillation Mode
Crystal Calibration Mode
Frequency
Frequency Tolerance @ 25
Frequency Stability Over Temp
Frequency Deviation Over Time
Total Allowable PPM Budget
Shunt Capacitance
Load Capacitance
Drive Level
Equivalent Series Resistance
Operating Temperature Range
LAN9211 XTAL1/CLKIN Pin
Capacitance
LAN9211 XTAL2 Pin
Capacitance
PARAMETER
The LAN9211 can accept either a 25MHz crystal (preferred) or a 25 MHz single-ended clock oscillator
(±50 PPM) input. The LAN9211 shares the 25MHz clock oscillator input (CLKIN) with the crystal input
XTAL1/CLKIN. If the single-ended clock oscillator method is implemented, XTAL2 should be left
unconnected and CLKIN should be driven with a nominal 0-3.3V clock signal. The input clock duty
cycle is 40% minimum, 50% typical and 60% maximum.
It is recommended that a crystal utilizing matching parallel load capacitors be used for the LAN9211
crystal input/output signals (XTAL1, XTAL2). See
specifications. Refer to application note AN10.7 - “Parallel Crystal Circuit Input Voltage Control” for
additional information.
Note 7.11 The maximum allowable values for Frequency Tolerance and Frequency Stability are
Note 7.12 Frequency Deviation Over Time is also referred to as Aging.
Note 7.13 The total deviation for the Transmitter Clock Frequency is specified by IEEE 802.3u as
Note 7.14 This number includes the pad, the bond wire and the lead frame. PCB capacitance is not
Clock Circuit
application dependant. Since any particular application must meet the IEEE +/-50 PPM
Total PPM Budget, the combination of these two values must be approximately +/-45 PPM
(allowing for aging).
+/- 50 PPM.
included in this value. The XTAL1/CLKIN and XTAL2 pin and PCB capacitance values are
required to accurately calculate the value of the two external load capacitors. These two
external load capacitors determine the accuracy of the 25.000 MHz frequency.
o
C
Table 7.7 LAN9211 Crystal Specifications
SYMBOL
F
F
F
F
P
C
temp
C
R
fund
age
tol
W
O
L
1
DATASHEET
MIN
300
0
Parallel Resonant Mode
-
-
-
-
-
-
-
-
-
-
143
Fundamental Mode
Table 7.7, "LAN9211 Crystal Specifications"
AT, typ
+/-3 to 5
25.000
20 typ
NOM
7 typ
3 typ
3 typ
-
-
-
-
-
-
+/-50
+/-50
+/-50
MAX
+70
50
-
-
-
-
-
-
-
UNITS
PPM
PPM
PPM
PPM
Ohm
MHz
uW
pF
pF
o
pF
pF
C
Revision 2.7 (03-15-10)
Note 7.11
Note 7.11
Note 7.12
Note 7.13
Note 7.14
Note 7.14
NOTES
for crystal