FDC37C669-MT SMSC, FDC37C669-MT Datasheet - Page 17

IC CTRLR SUPER I/O FLPPY 100TQFP

FDC37C669-MT

Manufacturer Part Number
FDC37C669-MT
Description
IC CTRLR SUPER I/O FLPPY 100TQFP
Manufacturer
SMSC
Datasheet

Specifications of FDC37C669-MT

Controller Type
I/O Controller
Interface
ISA Host
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
25mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
638-1008

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
FDC37C669-MT
Manufacturer:
Microchip Technology
Quantity:
10 000
SUPER I/O REGISTERS
The address map, shown below in Table 1, shows the
addresses of the different blocks of the Super I/O
immediately after power up. The base addresses of the
FDC, IDE, serial and parallel ports can be moved via the
configuration registers.
access more than one register.
Note 1: Configuration registers can only be modified in configuration mode, refer to the configuration register description
Note 2: The base addresses must be set in the configuration registers before accessing the logical devices.
for more information. Access to status registers A and B of the floppy disk is disabled in configuration mode.
3F0, 3F1 or 370, 371
Base +0,1
Base +[2:5, 7]
Base +[0:7]
Base +[0:7]
Base +[0:3] all modes
Base +[4:7] for EPP
Base +[400:403] for ECP
Base1 +[0:7]
Base2 +[6]
Some addresses are used to
ADDRESS
Table 1 - FDC37C669 Block Addresses
FUNCTIONAL DESCRIPTION
Configuration
Floppy Disk
Floppy Disk
Serial Port Com 1
Serial Port Com 2
Parallel Port
IDE
BLOCK NAME
17
HOST PROCESSOR INTERFACE
The host processor communicates with the FDC37C669
through a series of read/write registers.
addresses for these registers are shown in Table 1.
Register access is accomplished through programmed
I/O or DMA transfers. All registers are 8 bits wide except
the IDE data register at port 1F0H which is 16 bits wide.
All host interface output buffers are capable of sinking a
minimum of 12 mA.
Write only; Note 1, 2
Read only; Disabled at power
up; Note 2
Disabled at power up; Note 2
Disabled at power up; Note 2
Disabled at power up; Note 2
Disabled at power up; Note 2
Disabled at power up; Note 2
NOTES
The port

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